Merge "drm/msm: Turn off hardware clock gating before reading A5XX registers" (74d92987) · Commits · e / devices / android_kernel_sony_msm8998

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -409,8 +409,8 @@ static void a3xx_show(struct msm_gpu gpu, struct seq_file m)
		gpu->funcs->pm_resume(gpu);
		seq_printf(m, "status: %08x\n",
		gpu_read(gpu, REG_A3XX_RBBM_STATUS));
		gpu->funcs->pm_suspend(gpu);
		adreno_show(gpu, m);
		gpu->funcs->pm_suspend(gpu);
		}
		#endif

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -447,9 +447,9 @@ static void a4xx_show(struct msm_gpu gpu, struct seq_file m)

		seq_printf(m, "status: %08x\n",
		gpu_read(gpu, REG_A4XX_RBBM_STATUS));
		gpu->funcs->pm_suspend(gpu);

		adreno_show(gpu, m);
		gpu->funcs->pm_suspend(gpu);

		}
		#endif

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

+45 −14

Original line number	Diff line number	Diff line
		@@ -375,6 +375,7 @@ static const struct {
		void a5xx_set_hwcg(struct msm_gpu *gpu, bool state)
		{
		struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
		struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);
		unsigned int i;

		for (i = 0; i < ARRAY_SIZE(a5xx_hwcg); i++)
		@@ -391,6 +392,11 @@ void a5xx_set_hwcg(struct msm_gpu *gpu, bool state)

		gpu_write(gpu, REG_A5XX_RBBM_CLOCK_CNTL, state ? 0xAAA8AA00 : 0);
		gpu_write(gpu, REG_A5XX_RBBM_ISDB_CNT, state ? 0x182 : 0x180);

		if (state)
		set_bit(A5XX_HWCG_ENABLED, &a5xx_gpu->flags);
		else
		clear_bit(A5XX_HWCG_ENABLED, &a5xx_gpu->flags);
		}

		static int a5xx_me_init(struct msm_gpu *gpu)
		@@ -1168,6 +1174,10 @@ static int a5xx_pm_resume(struct msm_gpu *gpu)
		if (ret)
		return ret;

		/* If we are already up, don't mess with what works */
		if (gpu->active_cnt > 1)
		return 0;

		/* Turn the RBCCU domain first to limit the chances of voltage droop */
		gpu_write(gpu, REG_A5XX_GPMU_RBCCU_POWER_CNTL, 0x778000);

		@@ -1198,10 +1208,13 @@ static int a5xx_pm_suspend(struct msm_gpu *gpu)
		{
		struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);

		/* Only do this next bit if we are about to go down */
		if (gpu->active_cnt == 1) {
		/* Clear the VBIF pipe before shutting down */

		gpu_write(gpu, REG_A5XX_VBIF_XIN_HALT_CTRL0, 0xF);
		spin_until((gpu_read(gpu, REG_A5XX_VBIF_XIN_HALT_CTRL1) & 0xF) == 0xF);
		spin_until((gpu_read(gpu, REG_A5XX_VBIF_XIN_HALT_CTRL1) & 0xF)
		== 0xF);

		gpu_write(gpu, REG_A5XX_VBIF_XIN_HALT_CTRL0, 0);

		@@ -1209,11 +1222,13 @@ static int a5xx_pm_suspend(struct msm_gpu *gpu)
		* Reset the VBIF before power collapse to avoid issue with FIFO
		* entries
		*/

		if (adreno_is_a530(adreno_gpu)) {
		/* These only need to be done for A530 */
		gpu_write(gpu, REG_A5XX_RBBM_BLOCK_SW_RESET_CMD, 0x003C0000);
		gpu_write(gpu, REG_A5XX_RBBM_BLOCK_SW_RESET_CMD, 0x00000000);
		gpu_write(gpu, REG_A5XX_RBBM_BLOCK_SW_RESET_CMD,
		0x003C0000);
		gpu_write(gpu, REG_A5XX_RBBM_BLOCK_SW_RESET_CMD,
		0x00000000);
		}
		}

		return msm_gpu_pm_suspend(gpu);
		@@ -1233,13 +1248,29 @@ static int a5xx_get_timestamp(struct msm_gpu gpu, uint64_t value)
		#ifdef CONFIG_DEBUG_FS
		static void a5xx_show(struct msm_gpu gpu, struct seq_file m)
		{
		struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
		struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);
		bool enabled = test_bit(A5XX_HWCG_ENABLED, &a5xx_gpu->flags);

		gpu->funcs->pm_resume(gpu);

		seq_printf(m, "status: %08x\n",
		gpu_read(gpu, REG_A5XX_RBBM_STATUS));
		gpu->funcs->pm_suspend(gpu);

		/*
		* Temporarily disable hardware clock gating before going into
		* adreno_show to avoid issues while reading the registers
		*/

		if (enabled)
		a5xx_set_hwcg(gpu, false);

		adreno_show(gpu, m);

		if (enabled)
		a5xx_set_hwcg(gpu, true);

		gpu->funcs->pm_suspend(gpu);
		}
		#endif

drivers/gpu/drm/msm/adreno/a5xx_gpu.h

+1 −0

Original line number	Diff line number	Diff line
		@@ -23,6 +23,7 @@

		enum {
		A5XX_ZAP_SHADER_LOADED = 1,
		A5XX_HWCG_ENABLED = 2,
		};

		struct a5xx_gpu {

drivers/gpu/drm/msm/adreno/adreno_gpu.c

+0 −4

Original line number	Diff line number	Diff line
		@@ -297,8 +297,6 @@ void adreno_show(struct msm_gpu gpu, struct seq_file m)
		seq_printf(m, "rb wptr: %d\n", get_wptr(ring));
		}

		gpu->funcs->pm_resume(gpu);

		/* dump these out in a form that can be parsed by demsm: */
		seq_printf(m, "IO:region %s 00000000 00020000\n", gpu->name);
		for (i = 0; adreno_gpu->registers[i] != ~0; i += 2) {
		@@ -311,8 +309,6 @@ void adreno_show(struct msm_gpu gpu, struct seq_file m)
		seq_printf(m, "IO:R %08x %08x\n", addr<<2, val);
		}
		}

		gpu->funcs->pm_suspend(gpu);
		}
		#endif