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Commit 74981fb8 authored by Masahiro Yamada's avatar Masahiro Yamada Committed by Linus Walleij
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Documentation: gpio: fix bindings document 



Signed-off-by: default avatarMasahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 04d2264c

Documentation/devicetree/bindings/gpio/gpio.txt

+3 −2
Original line number Diff line number Diff line
@@ -69,7 +69,8 @@ GPIO pin number, and GPIO flags as accepted by the "qe_pio_e" gpio-controller. 
----------------------------------



A gpio-specifier should contain a flag indicating the GPIO polarity; active-

high or active-low. If it does, the follow best practices should be followed:

high or active-low. If it does, the following best practices should be

followed:



The gpio-specifier's polarity flag should represent the physical level at the

GPIO controller that achieves (or represents, for inputs) a logically asserted
@@ -147,7 +148,7 @@ contains information structures as follows: 
	numeric-gpio-range ::=

			<pinctrl-phandle> <gpio-base> <pinctrl-base> <count>

	named-gpio-range ::= <pinctrl-phandle> <gpio-base> '<0 0>'

	gpio-phandle : phandle to pin controller node.

	pinctrl-phandle : phandle to pin controller node

	gpio-base : Base GPIO ID in the GPIO controller

	pinctrl-base : Base pinctrl pin ID in the pin controller

	count : The number of GPIOs/pins in this range