Merge "asoc: codecs: sdm660_cdc: Fix LPASS register access during SSR" (73596ff8) · Commits · e / devices / android_kernel_sony_msm8998

sound/soc/codecs/sdm660_cdc/msm-digital-cdc.c

+4 −3

Original line number	Diff line number	Diff line
		/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
		/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
		*
		* This program is free software; you can redistribute it and/or modify
		* it under the terms of the GNU General Public License version 2 and
		@@ -86,6 +86,8 @@ static int msm_digcdc_clock_control(bool flag)
		if (flag) {
		mutex_lock(&pdata->cdc_int_mclk0_mutex);
		if (atomic_read(&pdata->int_mclk0_enabled) == false) {
		if (msm_dig_cdc->regmap->cache_only == true)
		return ret;
		if (pdata->native_clk_set)
		pdata->digital_cdc_core_clk.clk_freq_in_hz =
		NATIVE_MCLK_RATE;
		@@ -103,7 +105,6 @@ static int msm_digcdc_clock_control(bool flag)
		* Avoid access to lpass register
		* as clock enable failed during SSR.
		*/
		if (ret == -ENODEV)
		msm_dig_cdc->regmap->cache_only = true;
		return ret;
		}