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Commit 729b95ef authored Mar 20, 2012 by Alex Deucher Committed by Dave Airlie Mar 21, 2012

drm/radeon/kms: DCE6.1 disp eng pll updates



DCE6.1 uses EXT_PLL1 for disp eng.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

parent ca7db22b

drivers/gpu/drm/radeon/atombios_crtc.c

+3 −1

Original line number	Diff line number	Diff line
		@@ -767,7 +767,9 @@ static void atombios_crtc_set_disp_eng_pll(struct radeon_device *rdev,
		* SetPixelClock provides the dividers
		*/
		args.v6.ulDispEngClkFreq = cpu_to_le32(dispclk);
		if (ASIC_IS_DCE6(rdev))
		if (ASIC_IS_DCE61(rdev))
		args.v6.ucPpll = ATOM_EXT_PLL1;
		else if (ASIC_IS_DCE6(rdev))
		args.v6.ucPpll = ATOM_PPLL0;
		else
		args.v6.ucPpll = ATOM_DCPLL;