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Commit 70e2f15d authored by Taniya Das's avatar Taniya Das
Browse files

clk: qcom: gpucc: add and update clocks of GPUCC 



The fmax & num_fmax have been updated to reflect the new variable names.
Also update the new frequency of 700MHz to be supported by gfx3d clock.

Change-Id: I57297df9f2819e7d774dbb21302b55ede61a37b2
Signed-off-by: default avatarTaniya Das <tdas@codeaurora.org>
parent cd316285

drivers/clk/qcom/gpucc-msmfalcon.c

+8 −6
Original line number Diff line number Diff line
@@ -35,8 +35,8 @@ 
#define F(f, s, h, m, n) { (f), (s), (2 * (h) - 1), (m), (n) }

#define F_GFX(f, s, h, m, n, sf) { (f), (s), (2 * (h) - 1), (m), (n), (sf) }



static DEFINE_VDD_REGULATORS(vdd_dig, VDD_DIG_NUM, 1, vdd_corner, NULL);

static DEFINE_VDD_REGULATORS(vdd_mx, VDD_DIG_NUM, 1, vdd_corner, NULL);

static DEFINE_VDD_REGULATORS(vdd_dig, VDD_DIG_NUM, 1, vdd_corner);

static DEFINE_VDD_REGULATORS(vdd_mx, VDD_DIG_NUM, 1, vdd_corner);

static DEFINE_VDD_REGS_INIT(vdd_gfx, 1);



enum {
@@ -181,6 +181,7 @@ static struct clk_init_data gpu_clks_init[] = { 
 *  | 465000000 | 930000000    |    1        |    2    |

 *  | 588000000 | 1176000000   |    1        |    2    |

 *  | 647000000 | 1294000000   |    1        |    2    |

 *  | 700000000 | 1400000000   |    1        |    2    |

 *  | 750000000 | 1500000000   |    1        |    2    |

 *  ====================================================

*/
@@ -193,6 +194,7 @@ static const struct freq_tbl ftbl_gfx3d_clk_src[] = { 
	F_GFX(465000000, 0,  2, 0, 0,  930000000),

	F_GFX(588000000, 0,  2, 0, 0, 1176000000),

	F_GFX(647000000, 0,  2, 0, 0, 1294000000),

	F_GFX(700000000, 0,  2, 0, 0, 1400000000),

	F_GFX(750000000, 0,  2, 0, 0, 1500000000),

	{ }

};
@@ -376,9 +378,9 @@ static int of_get_fmax_vdd_class(struct platform_device *pdev, 
	if (!vdd->vdd_uv)

		return -ENOMEM;



	gpu_clks_init[index].fmax = devm_kzalloc(&pdev->dev, prop_len *

	gpu_clks_init[index].rate_max = devm_kzalloc(&pdev->dev, prop_len *

					sizeof(unsigned long), GFP_KERNEL);

	if (!gpu_clks_init[index].fmax)

	if (!gpu_clks_init[index].rate_max)

		return -ENOMEM;



	array = devm_kzalloc(&pdev->dev, prop_len * sizeof(u32) * num,
@@ -388,7 +390,7 @@ static int of_get_fmax_vdd_class(struct platform_device *pdev, 


	of_property_read_u32_array(of, prop_name, array, prop_len * num);

	for (i = 0; i < prop_len; i++) {

		gpu_clks_init[index].fmax[i] = array[num * i];

		gpu_clks_init[index].rate_max[i] = array[num * i];

		for (j = 1; j < num; j++) {

			vdd->vdd_uv[(num - 1) * i + (j - 1)] =

						array[num * i + j];
@@ -398,7 +400,7 @@ static int of_get_fmax_vdd_class(struct platform_device *pdev, 
	devm_kfree(&pdev->dev, array);

	vdd->num_levels = prop_len;

	vdd->cur_level = prop_len;

	gpu_clks_init[index].num_fmax = prop_len;

	gpu_clks_init[index].num_rate_max = prop_len;



	return 0;

}