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Commit 6d37d240 authored by Mauro Carvalho Chehab's avatar Mauro Carvalho Chehab
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i7core_edac: Fix an oops at i7core probe



changeset c91d57ba9ce5b5c93a7077e2f72510eb1f9131c4 moved the init
of the priv pointer to the end of the probe routine. However, we need
them before that, otherwise, we hit an OOPS:

[   67.743453] EDAC DEBUG: mci_bind_devs: Associated fn 0.0, dev = ffff88011b46e000, socket 0
[   67.751861] BUG: unable to handle kernel NULL pointer dereference at 0000000000000010
[   67.759685] IP: [<ffffffffa017e484>] i7core_probe+0x979/0x130c [i7core_edac]
[   67.766721] PGD 10bd38067 PUD 10bd37067 PMD 0
[   67.771178] Oops: 0000 [#1] SMP
[   67.774414] last sysfs file: /sys/devices/system/cpu/cpu1/cache/index2/shared_cpu_map
[   67.782213] CPU 1
[   67.784042] Modules linked in: i7core_edac(+) edac_core cpufreq_ondemand binfmt_misc dm_multipath video output pci_slot snd_hda_codd

Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@redhat.com>
parent 21b6806a
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+4 −4
Original line number Original line Diff line number Diff line
@@ -1968,6 +1968,10 @@ static int i7core_register_mci(struct i7core_dev *i7core_dev)
	pvt = mci->pvt_info;
	pvt = mci->pvt_info;
	memset(pvt, 0, sizeof(*pvt));
	memset(pvt, 0, sizeof(*pvt));


	/* Associates i7core_dev and mci for future usage */
	pvt->i7core_dev = i7core_dev;
	i7core_dev->mci = mci;

	/*
	/*
	 * FIXME: how to handle RDDR3 at MCI level? It is possible to have
	 * FIXME: how to handle RDDR3 at MCI level? It is possible to have
	 * Mixed RDDR3/UDDR3 with Nehalem, provided that they are on different
	 * Mixed RDDR3/UDDR3 with Nehalem, provided that they are on different
@@ -2033,10 +2037,6 @@ static int i7core_register_mci(struct i7core_dev *i7core_dev)
		goto fail1;
		goto fail1;
	}
	}


	/* Associates i7core_dev and mci for future usage */
	pvt->i7core_dev = i7core_dev;
	i7core_dev->mci = mci;

	return 0;
	return 0;


fail1:
fail1: