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Commit 6cecf76b authored by Scott Wood's avatar Scott Wood Committed by Benjamin Herrenschmidt
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powerpc/booke64: Fix kernel hangs at kernel_dbg_exc 



MSR_DE is not cleared on entry to the kernel, and we don't clear it
explicitly outside of debug code.  If we have MSR_DE set in
prime_debug_regs(), and the new thread has events enabled in DBCR0
(e.g.  ICMP is set in thread->dbsr0, even though it was cleared in the
real DBCR0 when the thread got scheduled out), we'll end up taking a
debug exception in the kernel when DBCR0 is loaded.  DSRR0 will not
point to an exception vector, and the kernel ends up hanging at
kernel_dbg_exc.  Fix this by always clearing MSR_DE when we load new
debug state.

Another observed source of kernel_dbg_exc hangs is with the branch
taken event.  If this event is active, but we take a non-debug trap
(e.g. a TLB miss or an asynchronous interrupt) before the next branch.
We end up taking a branch-taken debug exception on the initial branch
instruction of the exception vector, but because the debug exception is
DBSR_BT rather than DBSR_IC we branch to kernel_dbg_exc before even
checking the DSRR0 address.  Fix this by checking for DBSR_BT as well
as DBSR_IC, which is what 32-bit does and what the comments suggest was
intended in the 64-bit code as well.

Signed-off-by: default avatarScott Wood <scottwood@freescale.com>
Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
parent dcb615ae

arch/powerpc/kernel/exceptions-64e.S

+4 −4
Original line number Diff line number Diff line
@@ -489,7 +489,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) 
	 */



	mfspr	r14,SPRN_DBSR		/* check single-step/branch taken */

	andis.	r15,r14,DBSR_IC@h

	andis.	r15,r14,(DBSR_IC|DBSR_BT)@h

	beq+	1f



	LOAD_REG_IMMEDIATE(r14,interrupt_base_book3e)
@@ -500,7 +500,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) 
	bge+	cr1,1f



	/* here it looks like we got an inappropriate debug exception. */

	lis	r14,DBSR_IC@h		/* clear the IC event */

	lis	r14,(DBSR_IC|DBSR_BT)@h		/* clear the event */

	rlwinm	r11,r11,0,~MSR_DE	/* clear DE in the CSRR1 value */

	mtspr	SPRN_DBSR,r14

	mtspr	SPRN_CSRR1,r11
@@ -555,7 +555,7 @@ kernel_dbg_exc: 
	 */



	mfspr	r14,SPRN_DBSR		/* check single-step/branch taken */

	andis.	r15,r14,DBSR_IC@h

	andis.	r15,r14,(DBSR_IC|DBSR_BT)@h

	beq+	1f



	LOAD_REG_IMMEDIATE(r14,interrupt_base_book3e)
@@ -566,7 +566,7 @@ kernel_dbg_exc: 
	bge+	cr1,1f



	/* here it looks like we got an inappropriate debug exception. */

	lis	r14,DBSR_IC@h		/* clear the IC event */

	lis	r14,(DBSR_IC|DBSR_BT)@h		/* clear the event */

	rlwinm	r11,r11,0,~MSR_DE	/* clear DE in the DSRR1 value */

	mtspr	SPRN_DBSR,r14

	mtspr	SPRN_DSRR1,r11

arch/powerpc/kernel/process.c

+7 −0
Original line number Diff line number Diff line
@@ -339,6 +339,13 @@ static void set_debug_reg_defaults(struct thread_struct *thread) 


static void prime_debug_regs(struct thread_struct *thread)

{

	/*

	 * We could have inherited MSR_DE from userspace, since

	 * it doesn't get cleared on exception entry.  Make sure

	 * MSR_DE is clear before we enable any debug events.

	 */

	mtmsr(mfmsr() & ~MSR_DE);



	mtspr(SPRN_IAC1, thread->iac1);

	mtspr(SPRN_IAC2, thread->iac2);

#if CONFIG_PPC_ADV_DEBUG_IACS > 2