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Commit 6c067963 authored by Chen-Yu Tsai's avatar Chen-Yu Tsai Committed by Maxime Ripard
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ARM: dts: sun8i: Add NMI interrupt controller node 



The NMI interrupt controller is in charge of the NMI pin exposed by
the SoC to the PMIC. The PMIC signals interrupts through this.

Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
parent d92ff422

arch/arm/boot/dts/sun8i-a23-a33.dtsi

+8 −0
Original line number Diff line number Diff line
@@ -579,6 +579,14 @@ 
				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;

		};



		nmi_intc: interrupt-controller@01f00c0c {

			compatible = "allwinner,sun6i-a31-sc-nmi";

			interrupt-controller;

			#interrupt-cells = <2>;

			reg = <0x01f00c0c 0x38>;

			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;

		};



		prcm@01f01400 {

			compatible = "allwinner,sun8i-a23-prcm";

			reg = <0x01f01400 0x200>;