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Commit 6af3b9eb authored by Emil Tantilov's avatar Emil Tantilov Committed by David S. Miller
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ixgbe: fix link issues and panic with shared interrupts for 82598 



Fix possible panic/hang with shared Legacy interrupts by not enabling
interrupts when interface is down.

Also fixes an intermittent link by enabling LSC upon exit from ixgbe_intr()

This patch adds flags to ixgbe_irq_enable() to allow for some flexibility
when enabling interrupts.

Signed-off-by: default avatarEmil Tantilov <emil.s.tantilov@intel.com>
Tested-by: default avatarStephen Ko <stephen.s.ko@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent dd28d1a0

drivers/net/ixgbe/ixgbe_main.c

+26 −10
Original line number Diff line number Diff line
@@ -2233,7 +2233,8 @@ static void ixgbe_set_itr(struct ixgbe_adapter *adapter) 
 * ixgbe_irq_enable - Enable default interrupt generation settings

 * @adapter: board private structure

 **/

static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter)

static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,

				    bool flush)

{

	u32 mask;
@@ -2254,7 +2255,9 @@ static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter) 
		mask |= IXGBE_EIMS_FLOW_DIR;



	IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);

	if (queues)

		ixgbe_irq_enable_queues(adapter, ~0);

	if (flush)

		IXGBE_WRITE_FLUSH(&adapter->hw);



	if (adapter->num_vfs > 32) {
@@ -2277,7 +2280,7 @@ static irqreturn_t ixgbe_intr(int irq, void *data) 
	u32 eicr;



	/*

	 * Workaround for silicon errata.  Mask the interrupts

	 * Workaround for silicon errata on 82598.  Mask the interrupts

	 * before the read of EICR.

	 */

	IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
@@ -2286,10 +2289,15 @@ static irqreturn_t ixgbe_intr(int irq, void *data) 
	 * therefore no explict interrupt disable is necessary */

	eicr = IXGBE_READ_REG(hw, IXGBE_EICR);

	if (!eicr) {

		/* shared interrupt alert!

		/*

		 * shared interrupt alert!

		 * make sure interrupts are enabled because the read will

		 * have disabled interrupts due to EIAM */

		ixgbe_irq_enable(adapter);

		 * have disabled interrupts due to EIAM

		 * finish the workaround of silicon errata on 82598.  Unmask

		 * the interrupt that we masked before the EICR read.

		 */

		if (!test_bit(__IXGBE_DOWN, &adapter->state))

			ixgbe_irq_enable(adapter, true, true);

		return IRQ_NONE;	/* Not our interrupt */

	}
@@ -2313,6 +2321,14 @@ static irqreturn_t ixgbe_intr(int irq, void *data) 
		__napi_schedule(&(q_vector->napi));

	}



	/*

	 * re-enable link(maybe) and non-queue interrupts, no flush.

	 * ixgbe_poll will re-enable the queue interrupts

	 */



	if (!test_bit(__IXGBE_DOWN, &adapter->state))

		ixgbe_irq_enable(adapter, false, false);



	return IRQ_HANDLED;

}
@@ -3048,7 +3064,7 @@ static void ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid) 
	vlan_group_set_device(adapter->vlgrp, vid, NULL);



	if (!test_bit(__IXGBE_DOWN, &adapter->state))

		ixgbe_irq_enable(adapter);

		ixgbe_irq_enable(adapter, true, true);



	/* remove VID from filter table */

	hw->mac.ops.set_vfta(&adapter->hw, vid, pool_ndx, false);
@@ -3145,7 +3161,7 @@ static void ixgbe_vlan_rx_register(struct net_device *netdev, 
	ixgbe_vlan_rx_add_vid(netdev, 0);



	if (!test_bit(__IXGBE_DOWN, &adapter->state))

		ixgbe_irq_enable(adapter);

		ixgbe_irq_enable(adapter, true, true);

}



static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
@@ -3546,7 +3562,7 @@ static int ixgbe_up_complete(struct ixgbe_adapter *adapter) 


	/* clear any pending interrupts, may auto mask */

	IXGBE_READ_REG(hw, IXGBE_EICR);

	ixgbe_irq_enable(adapter);

	ixgbe_irq_enable(adapter, true, true);



	/*

	 * If this adapter has a fan, check to see if we had a failure