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Commit 692105b8 authored by Matt LaPlante's avatar Matt LaPlante Committed by Jiri Kosina
Browse files

trivial: fix typos/grammar errors in Kconfig texts 



Signed-off-by: default avatarMatt LaPlante <kernel1@cyberdogtech.com>
Acked-by: default avatarRandy Dunlap <randy.dunlap@oracle.com>
Signed-off-by: default avatarJiri Kosina <jkosina@suse.cz>
parent 877d0310

arch/arm/mach-omap1/Kconfig

+1 −1
Original line number Diff line number Diff line
@@ -109,7 +109,7 @@ config MACH_OMAP_PALMZ71 
	help

	 Support for the Palm Zire71 PDA. To boot the kernel,

	 you'll need a PalmOS compatible bootloader; check out

	 http://hackndev.com/palm/z71 for more informations.

	 http://hackndev.com/palm/z71 for more information.

	 Say Y here if you have such a PDA, say N otherwise.



config MACH_OMAP_PALMTT

arch/avr32/Kconfig

+3 −3
Original line number Diff line number Diff line
@@ -127,13 +127,13 @@ config BOARD_HAMMERHEAD 
	select CPU_AT32AP7000

	select USB_ARCH_HAS_HCD

	help

	  The Hammerhead platform is built around a AVR32 32-bit microcontroller from Atmel.

	  The Hammerhead platform is built around an AVR32 32-bit microcontroller from Atmel.

	  It offers versatile peripherals, such as ethernet, usb device, usb host etc.



	  The board also incooperates a power supply and is a Power over Ethernet (PoE) Powered

	  The board also incorporates a power supply and is a Power over Ethernet (PoE) Powered

	  Device (PD).



	  Additonally, a Cyclone III FPGA from Altera is integrated on the board. The FPGA is

	  Additionally, a Cyclone III FPGA from Altera is integrated on the board. The FPGA is

	  mapped into the 32-bit AVR memory bus. The FPGA offers two DDR2 SDRAM interfaces, which

	  will cover even the most exceptional need of memory bandwidth. Together with the onboard

	  video decoder the board is ready for video processing.

arch/blackfin/Kconfig

+3 −3
Original line number Diff line number Diff line
@@ -777,7 +777,7 @@ config CACHELINE_ALIGNED_L1 
	default n if BF54x

	depends on !BF531

	help

	  If enabled, cacheline_anligned data is linked

	  If enabled, cacheline_aligned data is linked

	  into L1 data memory. (less latency)



config SYSCALL_TAB_L1
@@ -957,7 +957,7 @@ config MPU 
	  memory they do not own.  This comes at a performance penalty

	  and is recommended only for debugging.



comment "Asynchonous Memory Configuration"

comment "Asynchronous Memory Configuration"



menu "EBIU_AMGCTL Global Control"

config C_AMCKEN
@@ -989,7 +989,7 @@ config C_B3PEN 
	default n



choice

	prompt"Enable Asynchonous Memory Banks"

	prompt "Enable Asynchronous Memory Banks"

	default C_AMBEN_ALL



config C_AMBEN

arch/cris/Kconfig

+3 −3
Original line number Diff line number Diff line
@@ -438,7 +438,7 @@ config ETRAX_SERIAL_PORT0_DMA1_IN 
	help

	  Enables the DMA1 input channel for ser0 (ttyS0).

	  If you do not enable DMA, an interrupt for each character will be

	  used when receiveing data.

	  used when receiving data.

	  Normally you want to use DMA, unless you use the DMA channel for

	  something else.
@@ -565,7 +565,7 @@ config ETRAX_SERIAL_PORT2_DMA7_IN 
	help

	  Enables the DMA7 input channel for ser2 (ttyS2).

	  If you do not enable DMA, an interrupt for each character will be

	  used when receiveing data.

	  used when receiving data.

	  Normally you want to use DMA, unless you use the DMA channel for

	  something else.
@@ -604,7 +604,7 @@ config ETRAX_SERIAL_PORT3_DMA3_IN 
	help

	  Enables the DMA3 input channel for ser3 (ttyS3).

	  If you do not enable DMA, an interrupt for each character will be

	  used when receiveing data.

	  used when receiving data.

	  Normally you want to use DMA, unless you use the DMA channel for

	  something else.

arch/cris/arch-v32/Kconfig

+1 −1
Original line number Diff line number Diff line
@@ -28,7 +28,7 @@ config ETRAX_NBR_LED_GRP_ONE 
	help

	  Select this if you want one Ethernet LED group. This LED group

	  can be used for one or more Ethernet interfaces. However, it is

	  recomended that each Ethernet interface use a dedicated LED group.

	  recommended that each Ethernet interface use a dedicated LED group.



config	ETRAX_NBR_LED_GRP_TWO

	bool "Use two LED groups"