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Commit 68a4ec9c authored by Linus Torvalds's avatar Linus Torvalds
Browse files
* 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus: (28 commits)
  MIPS: Add a CONFIG_FORCE_MAX_ZONEORDER Kconfig option.
  MIPS: LD/SD o32 macro GAS fix update
  MIPS: Alchemy: fix build with SERIAL_8250=n
  MIPS: Rename mips_dma_cache_sync back to dma_cache_sync
  MIPS: MT: Fix typo in comment.
  SSB: Fix nvram_get on BCM47xx platform
  MIPS: BCM47xx: Swap serial console if ttyS1 was specified.
  MIPS: BCM47xx: Use sscanf for parsing mac address
  MIPS: BCM47xx: Fill values for b43 into SSB sprom
  MIPS: BCM47xx: Do not read config from CFE
  MIPS: FDT size is a be32
  MIPS: Fix CP0 COUNTER clockevent race
  MIPS: Fix regression on BCM4710 processor detection
  MIPS: JZ4740: Fix pcm device name
  MIPS: Separate two consecutive loads in memset.S
  MIPS: Send proper signal and siginfo on FP emulator faults.
  MIPS: AR7: Fix loops per jiffies on TNETD7200 devices
  MIPS: AR7: Fix double ar7_gpio_init declaration
  MIPS: Rework GENERIC_HARDIRQS Kconfig.
  MIPS: Alchemy: Add return value check for strict_strtoul()
  ...
parents b3444d16 c9bace7c
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+24 −14
Original line number Diff line number Diff line
@@ -19,6 +19,8 @@ config MIPS
	select GENERIC_ATOMIC64 if !64BIT
	select HAVE_DMA_ATTRS
	select HAVE_DMA_API_DEBUG
	select HAVE_GENERIC_HARDIRQS
	select GENERIC_IRQ_PROBE

menu "Machine selection"

@@ -1664,6 +1666,28 @@ config PAGE_SIZE_64KB

endchoice

config FORCE_MAX_ZONEORDER
	int "Maximum zone order"
	range 13 64 if SYS_SUPPORTS_HUGETLBFS && PAGE_SIZE_32KB
	default "13" if SYS_SUPPORTS_HUGETLBFS && PAGE_SIZE_32KB
	range 12 64 if SYS_SUPPORTS_HUGETLBFS && PAGE_SIZE_16KB
	default "12" if SYS_SUPPORTS_HUGETLBFS && PAGE_SIZE_16KB
	range 11 64
	default "11"
	help
	  The kernel memory allocator divides physically contiguous memory
	  blocks into "zones", where each zone is a power of two number of
	  pages.  This option selects the largest power of two that the kernel
	  keeps in the memory allocator.  If you need to allocate very large
	  blocks of physically contiguous memory, then you may need to
	  increase this value.

	  This config option is actually maximum order plus one. For example,
	  a value of 11 means that the largest free memory block is 2^10 pages.

	  The page size is not necessarily 4KB.  Keep this in mind
	  when choosing a value for this option.

config BOARD_SCACHE
	bool

@@ -1921,20 +1945,6 @@ config CPU_R4000_WORKAROUNDS
config CPU_R4400_WORKAROUNDS
	bool

#
# Use the generic interrupt handling code in kernel/irq/:
#
config GENERIC_HARDIRQS
	bool
	default y

config GENERIC_IRQ_PROBE
	bool
	default y

config IRQ_PER_CPU
	bool

#
# - Highmem only makes sense for the 32-bit kernel.
# - The current highmem code will only work properly on physically indexed
+2 −0
Original line number Diff line number Diff line
@@ -27,6 +27,7 @@
static void alchemy_8250_pm(struct uart_port *port, unsigned int state,
			    unsigned int old_state)
{
#ifdef CONFIG_SERIAL_8250
	switch (state) {
	case 0:
		if ((__raw_readl(port->membase + UART_MOD_CNTRL) & 3) != 3) {
@@ -49,6 +50,7 @@ static void alchemy_8250_pm(struct uart_port *port, unsigned int state,
		serial8250_do_pm(port, state, old_state);
		break;
	}
#endif
}

#define PORT(_base, _irq)					\
+2 −3
Original line number Diff line number Diff line
@@ -54,10 +54,9 @@ void __init prom_init(void)

	prom_init_cmdline();
	memsize_str = prom_getenv("memsize");
	if (!memsize_str)
	if (!memsize_str || strict_strtoul(memsize_str, 0, &memsize))
		memsize = ALCHEMY_BOARD_DEFAULT_MEMSIZE;
	else
		strict_strtoul(memsize_str, 0, &memsize);

	add_memory_region(0, memsize, BOOT_MEM_RAM);
}

+3 −6
Original line number Diff line number Diff line
@@ -239,12 +239,12 @@ static void tnetd7300_set_clock(u32 shift, struct tnetd7300_clock *clock,
	calculate(base_clock, frequency, &prediv, &postdiv, &mul);

	writel(((prediv - 1) << PREDIV_SHIFT) | (postdiv - 1), &clock->ctrl);
	msleep(1);
	mdelay(1);
	writel(4, &clock->pll);
	while (readl(&clock->pll) & PLL_STATUS)
		;
	writel(((mul - 1) << MUL_SHIFT) | (0xff << 3) | 0x0e, &clock->pll);
	msleep(75);
	mdelay(75);
}

static void __init tnetd7300_init_clocks(void)
@@ -456,7 +456,7 @@ void clk_put(struct clk *clk)
}
EXPORT_SYMBOL(clk_put);

int __init ar7_init_clocks(void)
void __init ar7_init_clocks(void)
{
	switch (ar7_chip_id()) {
	case AR7_CHIP_7100:
@@ -472,7 +472,4 @@ int __init ar7_init_clocks(void)
	}
	/* adjust vbus clock rate */
	vbus_clk.rate = bus_clk.rate / 2;

	return 0;
}
arch_initcall(ar7_init_clocks);
+3 −0
Original line number Diff line number Diff line
@@ -30,6 +30,9 @@ void __init plat_time_init(void)
{
	struct clk *cpu_clk;

	/* Initialize ar7 clocks so the CPU clock frequency is correct */
	ar7_init_clocks();

	cpu_clk = clk_get(NULL, "cpu");
	if (IS_ERR(cpu_clk)) {
		printk(KERN_ERR "unable to get cpu clock\n");
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