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Commit 6721ab7f authored by Felipe Balbi's avatar Felipe Balbi Committed by Greg Kroah-Hartman
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serial: omap: enable RX and TX FIFO usage



enable RX FIFO for 16 characters and TX FIFO
for 16 spaces.

Tested-by: default avatarShubhrajyoti D <shubhrajyoti@ti.com>
Signed-off-by: default avatarFelipe Balbi <balbi@ti.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent d37c6ceb
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+7 −3
Original line number Diff line number Diff line
@@ -56,8 +56,8 @@
#define OMAP_UART_SCR_RX_TRIG_GRANU1_MASK		(1 << 7)

/* FCR register bitmasks */
#define OMAP_UART_FCR_RX_FIFO_TRIG_SHIFT		6
#define OMAP_UART_FCR_RX_FIFO_TRIG_MASK			(0x3 << 6)
#define OMAP_UART_FCR_TX_FIFO_TRIG_MASK			(0x3 << 4)

/* MVR register bitmasks */
#define OMAP_UART_MVR_SCHEME_SHIFT	30
@@ -834,9 +834,13 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,

	up->scr |= OMAP_UART_SCR_RX_TRIG_GRANU1_MASK;

	/* Set receive FIFO threshold to 1 byte */
	/* Set receive FIFO threshold to 16 characters and
	 * transmit FIFO threshold to 16 spaces
	 */
	up->fcr &= ~OMAP_UART_FCR_RX_FIFO_TRIG_MASK;
	up->fcr |= (0x1 << OMAP_UART_FCR_RX_FIFO_TRIG_SHIFT);
	up->fcr &= ~OMAP_UART_FCR_TX_FIFO_TRIG_MASK;
	up->fcr |= UART_FCR6_R_TRIGGER_16 | UART_FCR6_T_TRIGGER_24 |
		UART_FCR_ENABLE_FIFO;

	serial_out(up, UART_FCR, up->fcr);
	serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);