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Commit 671ee7f0 authored by Liu Gang-B34182's avatar Liu Gang-B34182 Committed by Linus Torvalds
Browse files

arch/powerpc/sysdev/fsl_rio.c: correct IECSR register clear value 



This bug causes the IECSR register clear failure.  In this case, the RETE
(retry error threshold exceeded) interrupt will be generated and cannot be
cleared.  So the related ISR may be called persistently.

The RETE bit in IECSR is cleared by writing a 1 to it.

Signed-off-by: default avatarLiu Gang <Gang.Liu@freescale.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Kumar Gala <galak@kernel.crashing.org>
Cc: <stable@kernel.org>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
parent 62d17601

arch/powerpc/sysdev/fsl_rio.c

+3 −2
Original line number Original line Diff line number Diff line
@@ -54,6 +54,7 @@ 
#define ODSR_CLEAR		0x1c00

#define ODSR_CLEAR		0x1c00

#define LTLEECSR_ENABLE_ALL	0xFFC000FC

#define LTLEECSR_ENABLE_ALL	0xFFC000FC

#define ESCSR_CLEAR		0x07120204

#define ESCSR_CLEAR		0x07120204

#define IECSR_CLEAR		0x80000000





#define RIO_PORT1_EDCSR		0x0640

#define RIO_PORT1_EDCSR		0x0640

#define RIO_PORT2_EDCSR		0x0680

#define RIO_PORT2_EDCSR		0x0680
@@ -1089,11 +1090,11 @@ static void port_error_handler(struct rio_mport *port, int offset) 




	if (offset == 0) {

	if (offset == 0) {

		out_be32((u32 *)(rio_regs_win + RIO_PORT1_EDCSR), 0);

		out_be32((u32 *)(rio_regs_win + RIO_PORT1_EDCSR), 0);

		out_be32((u32 *)(rio_regs_win + RIO_PORT1_IECSR), 0);

		out_be32((u32 *)(rio_regs_win + RIO_PORT1_IECSR), IECSR_CLEAR);

		out_be32((u32 *)(rio_regs_win + RIO_ESCSR), ESCSR_CLEAR);

		out_be32((u32 *)(rio_regs_win + RIO_ESCSR), ESCSR_CLEAR);

	} else {

	} else {

		out_be32((u32 *)(rio_regs_win + RIO_PORT2_EDCSR), 0);

		out_be32((u32 *)(rio_regs_win + RIO_PORT2_EDCSR), 0);

		out_be32((u32 *)(rio_regs_win + RIO_PORT2_IECSR), 0);

		out_be32((u32 *)(rio_regs_win + RIO_PORT2_IECSR), IECSR_CLEAR);

		out_be32((u32 *)(rio_regs_win + RIO_PORT2_ESCSR), ESCSR_CLEAR);

		out_be32((u32 *)(rio_regs_win + RIO_PORT2_ESCSR), ESCSR_CLEAR);

	}

	}

}

}