Merge "ath10k: Enable single queue NAPI for WCN3990 target" (651b36e8) · Commits · e / devices / android_kernel_sony_msm8998

drivers/net/wireless/ath/ath10k/ce.c

+29 −2

Original line number	Diff line number	Diff line
		@@ -735,7 +735,11 @@ void ath10k_ce_per_engine_service_any(struct ath10k *ar)
		{
		int ce_id;
		u32 intr_summary;
		struct ath10k_ce_pipe *ce_state;

		if (ar->target_version == ATH10K_HW_WCN3990)
		intr_summary = 0xFFF;
		else
		intr_summary = CE_INTERRUPT_SUMMARY(ar);

		for (ce_id = 0; intr_summary && (ce_id < CE_COUNT); ce_id++) {
		@@ -745,8 +749,11 @@ void ath10k_ce_per_engine_service_any(struct ath10k *ar)
		/* no intr pending on this CE */
		continue;

		ce_state = ((struct ath10k_ce_pipe *)ar->ce_states + ce_id);
		if (ce_state->send_cb \|\| ce_state->recv_cb)
		ath10k_ce_per_engine_service(ar, ce_id);
		}

		}

		/*
		@@ -798,6 +805,26 @@ void ath10k_ce_enable_interrupts(struct ath10k *ar)
		((struct ath10k_ce_pipe *)ar->ce_states + ce_id));
		}

		void ath10k_ce_enable_per_ce_interrupts(struct ath10k *ar, unsigned int ce_id)
		{
		u32 offset;
		u32 ctrl_addr = ath10k_ce_base_address(ar, ce_id);

		offset = HOST_IE_ADDRESS + ctrl_addr;
		ar->bus_write32(ar, offset, 1);
		ar->bus_read32(ar, offset);
		}

		void ath10k_ce_disable_per_ce_interrupts(struct ath10k *ar, unsigned int ce_id)
		{
		u32 offset;
		u32 ctrl_addr = ath10k_ce_base_address(ar, ce_id);

		offset = HOST_IE_ADDRESS + ctrl_addr;
		ar->bus_write32(ar, offset, 0);
		ar->bus_read32(ar, offset);
		}

		static int ath10k_ce_init_src_ring(struct ath10k *ar,
		unsigned int ce_id,
		const struct ce_attr *attr)

+2 −0

Original line number	Diff line number	Diff line
		@@ -239,6 +239,8 @@ void ath10k_ce_per_engine_service_any(struct ath10k *ar);
		void ath10k_ce_per_engine_service(struct ath10k *ar, unsigned int ce_id);
		int ath10k_ce_disable_interrupts(struct ath10k *ar);
		void ath10k_ce_enable_interrupts(struct ath10k *ar);
		void ath10k_ce_disable_per_ce_interrupts(struct ath10k *ar, unsigned int ce_id);
		void ath10k_ce_enable_per_ce_interrupts(struct ath10k *ar, unsigned int ce_id);

		/* ce_attr.flags values */
		/* Use NonSnooping PCIe accesses? */

+1 −1

Original line number	Diff line number	Diff line
		@@ -26,7 +26,7 @@ struct ath10k_hif_sg_item {
		u16 transfer_id;
		void transfer_context; / NULL = tx completion callback not called */
		void vaddr; / for debugging mostly */
		u32 paddr;
		dma_addr_t paddr;
		u16 len;
		};

+10 −4

Original line number	Diff line number	Diff line
		@@ -859,6 +859,8 @@ static u32 ath10k_pci_targ_cpu_to_ce_addr(struct ath10k *ar, u32 addr)
		case ATH10K_HW_QCA4019:
		val = ath10k_pci_read32(ar, PCIE_BAR_REG_ADDRESS);
		break;
		default:
		break;
		}

		val \|= 0x100000 \| (addr & 0xfffff);
		@@ -1363,8 +1365,8 @@ int ath10k_pci_hif_tx_sg(struct ath10k *ar, u8 pipe_id,

		for (i = 0; i < n_items - 1; i++) {
		ath10k_dbg(ar, ATH10K_DBG_PCI,
		"pci tx item %d paddr 0x%08x len %d n_items %d\n",
		i, items[i].paddr, items[i].len, n_items);
		"pci tx item %d paddr %pad len %d n_items %d\n",
		i, &items[i].paddr, items[i].len, n_items);
		ath10k_dbg_dump(ar, ATH10K_DBG_PCI_DUMP, NULL, "pci tx data: ",
		items[i].vaddr, items[i].len);

		@@ -1381,8 +1383,8 @@ int ath10k_pci_hif_tx_sg(struct ath10k *ar, u8 pipe_id,
		/* `i` is equal to `n_items -1` after for() */

		ath10k_dbg(ar, ATH10K_DBG_PCI,
		"pci tx item %d paddr 0x%08x len %d n_items %d\n",
		i, items[i].paddr, items[i].len, n_items);
		"pci tx item %d paddr %pad len %d n_items %d\n",
		i, &items[i].paddr, items[i].len, n_items);
		ath10k_dbg_dump(ar, ATH10K_DBG_PCI_DUMP, NULL, "pci tx data: ",
		items[i].vaddr, items[i].len);

		@@ -1591,6 +1593,8 @@ void ath10k_pci_irq_msi_fw_mask(struct ath10k *ar)
		* to mask irq/MSI.
		*/
		break;
		default:
		break;
		}
		}

		@@ -1617,6 +1621,8 @@ static void ath10k_pci_irq_msi_fw_unmask(struct ath10k *ar)
		* to unmask irq/MSI.
		*/
		break;
		default:
		break;
		}
		}

+690 −10

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