Loading drivers/gpu/drm/msm/msm_drv.c +1 −1 Original line number Diff line number Diff line Loading @@ -1683,7 +1683,7 @@ static struct drm_driver msm_driver = { .debugfs_cleanup = msm_debugfs_cleanup, #endif .ioctls = msm_ioctls, .num_ioctls = DRM_MSM_NUM_IOCTLS, .num_ioctls = ARRAY_SIZE(msm_ioctls), .fops = &fops, .name = "msm_drm", .desc = "MSM Snapdragon DRM", Loading include/uapi/drm/msm_drm.h +0 −1 Original line number Diff line number Diff line Loading @@ -267,7 +267,6 @@ struct drm_msm_event_resp { #define DRM_SDE_WB_CONFIG 0x40 #define DRM_MSM_REGISTER_EVENT 0x41 #define DRM_MSM_DEREGISTER_EVENT 0x42 #define DRM_MSM_NUM_IOCTLS 0x43 /** * Currently DRM framework supports only VSYNC event. Loading Loading
drivers/gpu/drm/msm/msm_drv.c +1 −1 Original line number Diff line number Diff line Loading @@ -1683,7 +1683,7 @@ static struct drm_driver msm_driver = { .debugfs_cleanup = msm_debugfs_cleanup, #endif .ioctls = msm_ioctls, .num_ioctls = DRM_MSM_NUM_IOCTLS, .num_ioctls = ARRAY_SIZE(msm_ioctls), .fops = &fops, .name = "msm_drm", .desc = "MSM Snapdragon DRM", Loading
include/uapi/drm/msm_drm.h +0 −1 Original line number Diff line number Diff line Loading @@ -267,7 +267,6 @@ struct drm_msm_event_resp { #define DRM_SDE_WB_CONFIG 0x40 #define DRM_MSM_REGISTER_EVENT 0x41 #define DRM_MSM_DEREGISTER_EVENT 0x42 #define DRM_MSM_NUM_IOCTLS 0x43 /** * Currently DRM framework supports only VSYNC event. Loading