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Commit 63dbca3e authored by Chandan Uddaraju's avatar Chandan Uddaraju Committed by Gerrit - the friendly Code Review server
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msm: mdss: add support to configure transfer unit for DP 



Configure the transfer unit settings to control the
symbol stuffing.

Change-Id: I80d6c1ae6d7096e170105e5d297a563b3bee053d
Signed-off-by: default avatarChandan Uddaraju <chandanu@codeaurora.org>
parent ba7779be

drivers/video/fbdev/msm/mdss_dp_aux.c

+6 −1
Original line number Diff line number Diff line
@@ -1312,9 +1312,14 @@ train_start: 


	pr_debug("Training 2 completed successfully\n");



	mdss_dp_state_ctrl(&dp->ctrl_io, ST_SEND_VIDEO);



clear:

	dp_clear_training_pattern(dp);

	if (ret != -1) {

		mdss_dp_setup_tr_unit(&dp->ctrl_io);

		mdss_dp_state_ctrl(&dp->ctrl_io, ST_SEND_VIDEO);

		pr_debug("State_ctrl set to SEND_VIDEO\n");

	}



	complete(&dp->train_comp);

	return ret;

drivers/video/fbdev/msm/mdss_dp_util.c

+9 −0
Original line number Diff line number Diff line
@@ -214,6 +214,15 @@ void mdss_dp_sw_mvid_nvid(struct dss_io_data *ctrl_io) 
	writel_relaxed(0x3c, ctrl_io->base + DP_SOFTWARE_NVID);

}



void mdss_dp_setup_tr_unit(struct dss_io_data *ctrl_io)

{

	/* Current Tr unit configuration supports only 1080p */

	writel_relaxed(0x21, ctrl_io->base + DP_MISC1_MISC0);

	writel_relaxed(0x0f0016, ctrl_io->base + DP_VALID_BOUNDARY);

	writel_relaxed(0x1f, ctrl_io->base + DP_TU);

	writel_relaxed(0x0, ctrl_io->base + DP_VALID_BOUNDARY_2);

}



void mdss_dp_ctrl_lane_mapping(struct dss_io_data *ctrl_io,

				struct lane_mapping l_map)

{

drivers/video/fbdev/msm/mdss_dp_util.h

+5 −1
Original line number Diff line number Diff line
@@ -48,10 +48,13 @@ 
#define	DP_START_HOR_VER_FROM_SYNC		(0x00000420)

#define	DP_HSYNC_VSYNC_WIDTH_POLARITY		(0x00000424)

#define	DP_ACTIVE_HOR_VER			(0x00000428)



#define	DP_MISC1_MISC0				(0x0000042C)

#define	DP_VALID_BOUNDARY			(0x00000430)

#define	DP_VALID_BOUNDARY_2			(0x00000434)

#define	DP_LOGICAL2PHYSCIAL_LANE_MAPPING	(0x00000438)



#define	DP_MAINLINK_READY			(0x00000440)

#define	DP_TU					(0x0000044C)



/*DP PHY Register offsets */

#define DP_PHY_REVISION_ID0                     (0x00000000)
@@ -99,6 +102,7 @@ void mdss_dp_mainlink_reset(struct dss_io_data *ctrl_io); 
void mdss_dp_phy_reset(struct dss_io_data *ctrl_io);

void mdss_dp_switch_usb3_phy_to_dp_mode(struct dss_io_data *tcsr_reg_io);

void mdss_dp_assert_phy_reset(struct dss_io_data *ctrl_io, bool assert);

void mdss_dp_setup_tr_unit(struct dss_io_data *ctrl_io);

void mdss_dp_phy_aux_setup(struct dss_io_data *phy_io);

void mdss_dp_hpd_configure(struct dss_io_data *ctrl_io, bool enable);

void mdss_dp_aux_ctrl(struct dss_io_data *ctrl_io, bool enable);