Loading arch/arm/boot/dts/qcom/vplatform-lfv-msm8996-blsp.dtsi +8 −8 Original line number Diff line number Diff line Loading @@ -36,8 +36,8 @@ pinctrl-0 = <&spi_9_active>; pinctrl-1 = <&spi_9_sleep>; clock-names = "iface_clk", "core_clk"; clocks = <&clock_gcc clk_gcc_blsp2_ahb_clk>, <&clock_gcc clk_gcc_blsp2_qup3_spi_apps_clk>; clocks = <&clock_virt clk_gcc_blsp2_ahb_clk>, <&clock_virt clk_gcc_blsp2_qup3_spi_apps_clk>; status = "disabled"; }; Loading @@ -54,8 +54,8 @@ qcom,clk-freq-out = <400000>; qcom,clk-freq-in = <19200000>; clock-names = "iface_clk", "core_clk"; clocks = <&clock_gcc clk_gcc_blsp1_ahb_clk>, <&clock_gcc clk_gcc_blsp1_qup6_i2c_apps_clk>; clocks = <&clock_virt clk_gcc_blsp1_ahb_clk>, <&clock_virt clk_gcc_blsp1_qup6_i2c_apps_clk>; pinctrl-names = "i2c_active", "i2c_sleep"; pinctrl-0 = <&i2c_6_active>; pinctrl-1 = <&i2c_6_sleep>; Loading @@ -75,8 +75,8 @@ qcom,clk-freq-out = <400000>; qcom,clk-freq-in = <19200000>; clock-names = "iface_clk", "core_clk"; clocks = <&clock_gcc clk_gcc_blsp2_ahb_clk>, <&clock_gcc clk_gcc_blsp2_qup2_i2c_apps_clk>; clocks = <&clock_virt clk_gcc_blsp2_ahb_clk>, <&clock_virt clk_gcc_blsp2_qup2_i2c_apps_clk>; pinctrl-names = "i2c_active", "i2c_sleep"; pinctrl-0 = <&i2c_8_active>; pinctrl-1 = <&i2c_8_sleep>; Loading @@ -99,8 +99,8 @@ qcom,bam-rx-ep-pipe-index = <3>; qcom,master-id = <86>; clock-names = "core_clk", "iface_clk"; clocks = <&clock_gcc clk_gcc_blsp1_uart2_apps_clk>, <&clock_gcc clk_gcc_blsp1_ahb_clk>; clocks = <&clock_virt clk_gcc_blsp1_uart2_apps_clk>, <&clock_virt clk_gcc_blsp1_ahb_clk>; pinctrl-names = "sleep", "default"; pinctrl-0 = <&blsp1_uart2_sleep>; pinctrl-1 = <&blsp1_uart2_active>; Loading arch/arm/boot/dts/qcom/vplatform-lfv-msm8996.dtsi +7 −2 Original line number Diff line number Diff line Loading @@ -96,8 +96,8 @@ interrupt-names = "hc_irq", "pwr_irq"; clock-names = "iface_clk", "core_clk"; clocks = <&clock_gcc clk_gcc_sdcc2_ahb_clk>, <&clock_gcc clk_gcc_sdcc2_apps_clk>; clocks = <&clock_virt clk_gcc_sdcc2_ahb_clk>, <&clock_virt clk_gcc_sdcc2_apps_clk>; qcom,large-address-bus; qcom,bus-width = <4>; Loading Loading @@ -696,6 +696,11 @@ qcom,pipe-attr-ee; }; clock_virt: qcom,virtclk-frontend@0 { compatible = "qcom,virtclk-frontend-8996"; #clock-cells = <1>; }; clock_gcc: qcom,gcc@300000 { compatible = "qcom,dummycc"; #clock-cells = <1>; Loading Loading
arch/arm/boot/dts/qcom/vplatform-lfv-msm8996-blsp.dtsi +8 −8 Original line number Diff line number Diff line Loading @@ -36,8 +36,8 @@ pinctrl-0 = <&spi_9_active>; pinctrl-1 = <&spi_9_sleep>; clock-names = "iface_clk", "core_clk"; clocks = <&clock_gcc clk_gcc_blsp2_ahb_clk>, <&clock_gcc clk_gcc_blsp2_qup3_spi_apps_clk>; clocks = <&clock_virt clk_gcc_blsp2_ahb_clk>, <&clock_virt clk_gcc_blsp2_qup3_spi_apps_clk>; status = "disabled"; }; Loading @@ -54,8 +54,8 @@ qcom,clk-freq-out = <400000>; qcom,clk-freq-in = <19200000>; clock-names = "iface_clk", "core_clk"; clocks = <&clock_gcc clk_gcc_blsp1_ahb_clk>, <&clock_gcc clk_gcc_blsp1_qup6_i2c_apps_clk>; clocks = <&clock_virt clk_gcc_blsp1_ahb_clk>, <&clock_virt clk_gcc_blsp1_qup6_i2c_apps_clk>; pinctrl-names = "i2c_active", "i2c_sleep"; pinctrl-0 = <&i2c_6_active>; pinctrl-1 = <&i2c_6_sleep>; Loading @@ -75,8 +75,8 @@ qcom,clk-freq-out = <400000>; qcom,clk-freq-in = <19200000>; clock-names = "iface_clk", "core_clk"; clocks = <&clock_gcc clk_gcc_blsp2_ahb_clk>, <&clock_gcc clk_gcc_blsp2_qup2_i2c_apps_clk>; clocks = <&clock_virt clk_gcc_blsp2_ahb_clk>, <&clock_virt clk_gcc_blsp2_qup2_i2c_apps_clk>; pinctrl-names = "i2c_active", "i2c_sleep"; pinctrl-0 = <&i2c_8_active>; pinctrl-1 = <&i2c_8_sleep>; Loading @@ -99,8 +99,8 @@ qcom,bam-rx-ep-pipe-index = <3>; qcom,master-id = <86>; clock-names = "core_clk", "iface_clk"; clocks = <&clock_gcc clk_gcc_blsp1_uart2_apps_clk>, <&clock_gcc clk_gcc_blsp1_ahb_clk>; clocks = <&clock_virt clk_gcc_blsp1_uart2_apps_clk>, <&clock_virt clk_gcc_blsp1_ahb_clk>; pinctrl-names = "sleep", "default"; pinctrl-0 = <&blsp1_uart2_sleep>; pinctrl-1 = <&blsp1_uart2_active>; Loading
arch/arm/boot/dts/qcom/vplatform-lfv-msm8996.dtsi +7 −2 Original line number Diff line number Diff line Loading @@ -96,8 +96,8 @@ interrupt-names = "hc_irq", "pwr_irq"; clock-names = "iface_clk", "core_clk"; clocks = <&clock_gcc clk_gcc_sdcc2_ahb_clk>, <&clock_gcc clk_gcc_sdcc2_apps_clk>; clocks = <&clock_virt clk_gcc_sdcc2_ahb_clk>, <&clock_virt clk_gcc_sdcc2_apps_clk>; qcom,large-address-bus; qcom,bus-width = <4>; Loading Loading @@ -696,6 +696,11 @@ qcom,pipe-attr-ee; }; clock_virt: qcom,virtclk-frontend@0 { compatible = "qcom,virtclk-frontend-8996"; #clock-cells = <1>; }; clock_gcc: qcom,gcc@300000 { compatible = "qcom,dummycc"; #clock-cells = <1>; Loading