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Commit 616b8434 authored by Jerome Glisse's avatar Jerome Glisse Committed by Dave Airlie
Browse files

drm/radeon/kms: Add specific rs690 authorized register table 



rs690 is r3xx 3D engine with AVIVO modesetting so we need to allow
AVIVO register for vline synchronization. This add a specific table
to rs690 to handle that. Thanks to Marc (marvin24) for debugging
this and kudos to Andre (taiu1) for spotting the origin of the bugs.

Signed-off-by: default avatarJerome Glisse <jglisse@redhat.com>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent 64f1607f

drivers/gpu/drm/radeon/radeon_asic.h

+2 −1
Original line number Original line Diff line number Diff line
@@ -308,6 +308,7 @@ static struct radeon_asic rs600_asic = { 
/*

/*

 * rs690,rs740

 * rs690,rs740

 */

 */

int rs690_init(struct radeon_device *rdev);

void rs690_errata(struct radeon_device *rdev);

void rs690_errata(struct radeon_device *rdev);

void rs690_vram_info(struct radeon_device *rdev);

void rs690_vram_info(struct radeon_device *rdev);

int rs690_mc_init(struct radeon_device *rdev);

int rs690_mc_init(struct radeon_device *rdev);
@@ -316,7 +317,7 @@ uint32_t rs690_mc_rreg(struct radeon_device *rdev, uint32_t reg); 
void rs690_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);

void rs690_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);

void rs690_bandwidth_update(struct radeon_device *rdev);

void rs690_bandwidth_update(struct radeon_device *rdev);

static struct radeon_asic rs690_asic = {

static struct radeon_asic rs690_asic = {

	.init = &r300_init,

	.init = &rs690_init,

	.errata = &rs690_errata,

	.errata = &rs690_errata,

	.vram_info = &rs690_vram_info,

	.vram_info = &rs690_vram_info,

	.gpu_reset = &r300_gpu_reset,

	.gpu_reset = &r300_gpu_reset,

drivers/gpu/drm/radeon/rs690.c

+65 −0
Original line number Original line Diff line number Diff line
@@ -652,3 +652,68 @@ void rs690_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v) 
	WREG32(RS690_MC_DATA, v);

	WREG32(RS690_MC_DATA, v);

	WREG32(RS690_MC_INDEX, RS690_MC_INDEX_WR_ACK);

	WREG32(RS690_MC_INDEX, RS690_MC_INDEX_WR_ACK);

}

}



static const unsigned rs690_reg_safe_bm[219] = {

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

	0x17FF1FFF,0xFFFFFFFC,0xFFFFFFFF,0xFF30FFBF,

	0xFFFFFFF8,0xC3E6FFFF,0xFFFFF6DF,0xFFFFFFFF,

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFF03F,

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

	0xFFFFFFFF,0xFFFFEFCE,0xF00EBFFF,0x007C0000,

	0xF0000078,0xFF000009,0xFFFFFFFF,0xFFFFFFFF,

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

	0xFFFFF7FF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

	0xFFFFFC78,0xFFFFFFFF,0xFFFFFFFE,0xFFFFFFFF,

	0x38FF8F50,0xFFF88082,0xF000000C,0xFAE009FF,

	0x0000FFFF,0xFFFFFFFF,0xFFFFFFFF,0x00000000,

	0x00000000,0x0000C100,0x00000000,0x00000000,

	0x00000000,0x00000000,0x00000000,0x00000000,

	0x00000000,0xFFFF0000,0xFFFFFFFF,0xFF80FFFF,

	0x00000000,0x00000000,0x00000000,0x00000000,

	0x0003FC01,0xFFFFFFF8,0xFE800B19,0xFFFFFFFF,

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

	0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,

};



int rs690_init(struct radeon_device *rdev)

{

	rdev->config.r300.reg_safe_bm = rs690_reg_safe_bm;

	rdev->config.r300.reg_safe_bm_size = ARRAY_SIZE(rs690_reg_safe_bm);

	return 0;

}