Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 5dbc2c04 authored by Deepak Kumar's avatar Deepak Kumar
Browse files

ARM: dts: msm: Add GPU power level speed bins for SDM660 



SDM660 supports multiple GPU power level speed bins. This
change adds all supported GPU power levels speed bins.
Specific speed bin will be used based on efuse value.

Change-Id: Ie542ee2439713ccbba17d38cef5e6ffd95a8b249
Signed-off-by: default avatarDeepak Kumar <dkumar@codeaurora.org>
parent 110e102f

arch/arm/boot/dts/qcom/sdm660-gpu.dtsi

+339 −79
Original line number Diff line number Diff line
@@ -58,8 +58,9 @@ 
		label = "kgsl-3d0";

		compatible = "qcom,kgsl-3d0", "qcom,kgsl-3d";

		status = "ok";

		reg = <0x5000000 0x40000>;

		reg-names = "kgsl_3d0_reg_memory";

		reg = <0x5000000 0x40000

			0x780000 0x6220>;

		reg-names = "kgsl_3d0_reg_memory", "qfprom_memory";

		interrupts = <0 300 0>;

		interrupt-names = "kgsl_3d0_irq";

		qcom,id = <0>;
@@ -135,6 +136,8 @@ 
		/* Context aware jump target power level */

		qcom,ca-target-pwrlevel = <4>;



		qcom,gpu-speed-bin = <0x41a0 0x1fe00000 21>;



		/* GPU Mempools */

		qcom,gpu-mempools {

			#address-cells= <1>;
@@ -155,12 +158,25 @@ 
			};

		};



		/* Power levels */

		qcom,gpu-pwrlevels {

		/*

		 * Speed-bin zero is default speed bin.

		 * For rest of the speed bins, speed-bin value

		 * is calulated as FMAX/4.8 MHz round up to zero

		 * decimal places.

		 */

		qcom,gpu-pwrlevel-bins {

			#address-cells = <1>;

			#size-cells = <0>;



			compatible="qcom,gpu-pwrlevel-bins";



			qcom,gpu-pwrlevels-0 {

				#address-cells = <1>;

				#size-cells = <0>;



			compatible = "qcom,gpu-pwrlevels";

				qcom,speed-bin = <0>;



				qcom,initial-pwrlevel = <6>;



				/* TURBO */

				qcom,gpu-pwrlevel@0 {
@@ -243,6 +259,250 @@ 
					qcom,bus-max = <0>;

				};

			};



			qcom,gpu-pwrlevels-1 {

				#address-cells = <1>;

				#size-cells = <0>;



				qcom,speed-bin = <157>;



				qcom,initial-pwrlevel = <6>;



				/* TURBO */

				qcom,gpu-pwrlevel@0 {

					reg = <0>;

					qcom,gpu-freq = <750000000>;

					qcom,bus-freq = <13>;

					qcom,bus-min = <12>;

					qcom,bus-max = <13>;

				};



				/* TURBO */

				qcom,gpu-pwrlevel@1 {

					reg = <1>;

					qcom,gpu-freq = <700000000>;

					qcom,bus-freq = <11>;

					qcom,bus-min = <11>;

					qcom,bus-max = <13>;

				};



				/* NOM_L1 */

				qcom,gpu-pwrlevel@2 {

					reg = <2>;

					qcom,gpu-freq = <647000000>;

					qcom,bus-freq = <11>;

					qcom,bus-min = <10>;

					qcom,bus-max = <12>;

				};



				/* NOM */

				qcom,gpu-pwrlevel@3 {

					reg = <3>;

					qcom,gpu-freq = <588000000>;

					qcom,bus-freq = <10>;

					qcom,bus-min = <9>;

					qcom,bus-max = <12>;

				};



				/* SVS_L1 */

				qcom,gpu-pwrlevel@4 {

					reg = <4>;

					qcom,gpu-freq = <465000000>;

					qcom,bus-freq = <9>;

					qcom,bus-min = <8>;

					qcom,bus-max = <11>;

				};



				/* SVS */

				qcom,gpu-pwrlevel@5 {

					reg = <5>;

					qcom,gpu-freq = <370000000>;

					qcom,bus-freq = <8>;

					qcom,bus-min = <6>;

					qcom,bus-max = <9>;

				};



				/* Low SVS */

				qcom,gpu-pwrlevel@6 {

					reg = <6>;

					qcom,gpu-freq = <266000000>;

					qcom,bus-freq = <3>;

					qcom,bus-min = <3>;

					qcom,bus-max = <6>;

				};



				/* Min SVS */

				qcom,gpu-pwrlevel@7 {

					reg = <7>;

					qcom,gpu-freq = <160000000>;

					qcom,bus-freq = <3>;

					qcom,bus-min = <3>;

					qcom,bus-max = <5>;

				};



				/* XO */

				qcom,gpu-pwrlevel@8 {

					reg = <8>;

					qcom,gpu-freq = <19200000>;

					qcom,bus-freq = <0>;

					qcom,bus-min = <0>;

					qcom,bus-max = <0>;

				};

			};



			qcom,gpu-pwrlevels-2 {

				#address-cells = <1>;

				#size-cells = <0>;



				qcom,speed-bin = <146>;



				qcom,initial-pwrlevel = <5>;



				/* TURBO */

				qcom,gpu-pwrlevel@0 {

					reg = <0>;

					qcom,gpu-freq = <700000000>;

					qcom,bus-freq = <13>;

					qcom,bus-min = <12>;

					qcom,bus-max = <13>;

				};



				/* NOM_L1 */

				qcom,gpu-pwrlevel@1 {

					reg = <1>;

					qcom,gpu-freq = <647000000>;

					qcom,bus-freq = <11>;

					qcom,bus-min = <10>;

					qcom,bus-max = <12>;

				};



				/* NOM */

				qcom,gpu-pwrlevel@2 {

					reg = <2>;

					qcom,gpu-freq = <588000000>;

					qcom,bus-freq = <10>;

					qcom,bus-min = <9>;

					qcom,bus-max = <12>;

				};



				/* SVS_L1 */

				qcom,gpu-pwrlevel@3 {

					reg = <3>;

					qcom,gpu-freq = <465000000>;

					qcom,bus-freq = <9>;

					qcom,bus-min = <8>;

					qcom,bus-max = <11>;

				};



				/* SVS */

				qcom,gpu-pwrlevel@4 {

					reg = <4>;

					qcom,gpu-freq = <370000000>;

					qcom,bus-freq = <8>;

					qcom,bus-min = <6>;

					qcom,bus-max = <9>;

				};



				/* Low SVS */

				qcom,gpu-pwrlevel@5 {

					reg = <5>;

					qcom,gpu-freq = <266000000>;

					qcom,bus-freq = <3>;

					qcom,bus-min = <3>;

					qcom,bus-max = <6>;

				};



				/* Min SVS */

				qcom,gpu-pwrlevel@6 {

					reg = <6>;

					qcom,gpu-freq = <160000000>;

					qcom,bus-freq = <3>;

					qcom,bus-min = <3>;

					qcom,bus-max = <5>;

				};



				/* XO */

				qcom,gpu-pwrlevel@7 {

					reg = <7>;

					qcom,gpu-freq = <19200000>;

					qcom,bus-freq = <0>;

					qcom,bus-min = <0>;

					qcom,bus-max = <0>;

				};

			};



			qcom,gpu-pwrlevels-3 {

				#address-cells = <1>;

				#size-cells = <0>;



				qcom,speed-bin = <135>;



				qcom,initial-pwrlevel = <4>;



				/* NOM_L1 */

				qcom,gpu-pwrlevel@0 {

					reg = <0>;

					qcom,gpu-freq = <647000000>;

					qcom,bus-freq = <13>;

					qcom,bus-min = <12>;

					qcom,bus-max = <13>;

				};



				/* NOM */

				qcom,gpu-pwrlevel@1 {

					reg = <1>;

					qcom,gpu-freq = <588000000>;

					qcom,bus-freq = <10>;

					qcom,bus-min = <9>;

					qcom,bus-max = <12>;

				};



				/* SVS_L1 */

				qcom,gpu-pwrlevel@2 {

					reg = <2>;

					qcom,gpu-freq = <465000000>;

					qcom,bus-freq = <9>;

					qcom,bus-min = <8>;

					qcom,bus-max = <11>;

				};



				/* SVS */

				qcom,gpu-pwrlevel@3 {

					reg = <3>;

					qcom,gpu-freq = <370000000>;

					qcom,bus-freq = <8>;

					qcom,bus-min = <6>;

					qcom,bus-max = <9>;

				};



				/* Low SVS */

				qcom,gpu-pwrlevel@4 {

					reg = <4>;

					qcom,gpu-freq = <266000000>;

					qcom,bus-freq = <3>;

					qcom,bus-min = <3>;

					qcom,bus-max = <6>;

				};



				/* Min SVS */

				qcom,gpu-pwrlevel@5 {

					reg = <5>;

					qcom,gpu-freq = <160000000>;

					qcom,bus-freq = <3>;

					qcom,bus-min = <3>;

					qcom,bus-max = <5>;

				};



				/* XO */

				qcom,gpu-pwrlevel@6 {

					reg = <6>;

					qcom,gpu-freq = <19200000>;

					qcom,bus-freq = <0>;

					qcom,bus-min = <0>;

					qcom,bus-max = <0>;

				};

			};

		};

	};



	kgsl_msm_iommu: qcom,kgsl-iommu {