Loading drivers/serial/8250.c +6 −0 Original line number Diff line number Diff line Loading @@ -2326,6 +2326,12 @@ static struct uart_driver serial8250_reg = { .cons = SERIAL8250_CONSOLE, }; /* * early_serial_setup - early registration for 8250 ports * * Setup an 8250 port structure prior to console initialisation. Use * after console initialisation will cause undefined behaviour. */ int __init early_serial_setup(struct uart_port *port) { if (port->line >= ARRAY_SIZE(serial8250_ports)) Loading include/linux/serial_reg.h +2 −2 Original line number Diff line number Diff line Loading @@ -247,10 +247,10 @@ #define UART_CTR 0xFF /* * The 16C950 Additional Control Reigster * The 16C950 Additional Control Register */ #define UART_ACR_RXDIS 0x01 /* Receiver disable */ #define UART_ACR_TXDIS 0x02 /* Receiver disable */ #define UART_ACR_TXDIS 0x02 /* Transmitter disable */ #define UART_ACR_DSRFC 0x04 /* DSR Flow Control */ #define UART_ACR_TLENB 0x20 /* 950 trigger levels enable */ #define UART_ACR_ICRRD 0x40 /* ICR Read enable */ Loading Loading
drivers/serial/8250.c +6 −0 Original line number Diff line number Diff line Loading @@ -2326,6 +2326,12 @@ static struct uart_driver serial8250_reg = { .cons = SERIAL8250_CONSOLE, }; /* * early_serial_setup - early registration for 8250 ports * * Setup an 8250 port structure prior to console initialisation. Use * after console initialisation will cause undefined behaviour. */ int __init early_serial_setup(struct uart_port *port) { if (port->line >= ARRAY_SIZE(serial8250_ports)) Loading
include/linux/serial_reg.h +2 −2 Original line number Diff line number Diff line Loading @@ -247,10 +247,10 @@ #define UART_CTR 0xFF /* * The 16C950 Additional Control Reigster * The 16C950 Additional Control Register */ #define UART_ACR_RXDIS 0x01 /* Receiver disable */ #define UART_ACR_TXDIS 0x02 /* Receiver disable */ #define UART_ACR_TXDIS 0x02 /* Transmitter disable */ #define UART_ACR_DSRFC 0x04 /* DSR Flow Control */ #define UART_ACR_TLENB 0x20 /* 950 trigger levels enable */ #define UART_ACR_ICRRD 0x40 /* ICR Read enable */ Loading