Loading drivers/scsi/ufs/ufshcd.c +29 −5 Original line number Diff line number Diff line Loading @@ -4205,7 +4205,13 @@ static int __ufshcd_uic_hibern8_enter(struct ufs_hba *hba) trace_ufshcd_profile_hibern8(dev_name(hba->dev), "enter", ktime_to_us(ktime_sub(ktime_get(), start)), ret); if (ret) { /* * Do full reinit if enter failed or if LINERESET was detected during * Hibern8 operation. After LINERESET, link moves to default PWM-G1 * mode hence full reinit is required to move link to HS speeds. */ if (ret || hba->full_init_linereset) { hba->full_init_linereset = false; ufshcd_update_error_stats(hba, UFS_ERR_HIBERN8_ENTER); dev_err(hba->dev, "%s: hibern8 enter failed. ret = %d", __func__, ret); Loading Loading @@ -4248,8 +4254,13 @@ int ufshcd_uic_hibern8_exit(struct ufs_hba *hba) ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd); trace_ufshcd_profile_hibern8(dev_name(hba->dev), "exit", ktime_to_us(ktime_sub(ktime_get(), start)), ret); if (ret) { /* * Do full reinit if exit failed or if LINERESET was detected during * Hibern8 operation. After LINERESET, link moves to default PWM-G1 * mode hence full reinit is required to move link to HS speeds. */ if (ret || hba->full_init_linereset) { hba->full_init_linereset = false; ufshcd_update_error_stats(hba, UFS_ERR_HIBERN8_EXIT); dev_err(hba->dev, "%s: hibern8 exit failed. ret = %d", __func__, ret); Loading Loading @@ -5900,9 +5911,8 @@ static void ufshcd_update_uic_error(struct ufs_hba *hba) /* PHY layer lane error */ reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER); /* Ignore LINERESET indication, as this is not an error */ if ((reg & UIC_PHY_ADAPTER_LAYER_ERROR) && (reg & UIC_PHY_ADAPTER_LAYER_LANE_ERR_MASK)) { (reg & UIC_PHY_ADAPTER_LAYER_ERROR_CODE_MASK)) { /* * To know whether this error is fatal or not, DB timeout * must be checked but this error is handled separately. Loading @@ -5910,6 +5920,20 @@ static void ufshcd_update_uic_error(struct ufs_hba *hba) dev_dbg(hba->dev, "%s: UIC Lane error reported, reg 0x%x\n", __func__, reg); ufshcd_update_uic_reg_hist(&hba->ufs_stats.pa_err, reg); /* Don't ignore LINERESET indication during hibern8 operation */ if (reg & UIC_PHY_ADAPTER_LAYER_GENERIC_ERROR) { struct uic_command *cmd = hba->active_uic_cmd; if (cmd) { if ((cmd->command == UIC_CMD_DME_HIBER_ENTER) || (cmd->command == UIC_CMD_DME_HIBER_EXIT)) { dev_err(hba->dev, "%s: LINERESET during hibern8, reg 0x%x\n", __func__, reg); hba->full_init_linereset = true; } } } } /* PA_INIT_ERROR is fatal and needs UIC reset */ Loading drivers/scsi/ufs/ufshcd.h +2 −0 Original line number Diff line number Diff line Loading @@ -905,6 +905,8 @@ struct ufs_hba { bool no_ref_clk_gating; int scsi_block_reqs_cnt; bool full_init_linereset; }; static inline void ufshcd_mark_shutdown_ongoing(struct ufs_hba *hba) Loading drivers/scsi/ufs/ufshci.h +1 −0 Original line number Diff line number Diff line Loading @@ -190,6 +190,7 @@ enum { /* UECPA - Host UIC Error Code PHY Adapter Layer 38h */ #define UIC_PHY_ADAPTER_LAYER_ERROR UFS_BIT(31) #define UIC_PHY_ADAPTER_LAYER_GENERIC_ERROR UFS_BIT(4) #define UIC_PHY_ADAPTER_LAYER_ERROR_CODE_MASK 0x1F #define UIC_PHY_ADAPTER_LAYER_LANE_ERR_MASK 0xF Loading Loading
drivers/scsi/ufs/ufshcd.c +29 −5 Original line number Diff line number Diff line Loading @@ -4205,7 +4205,13 @@ static int __ufshcd_uic_hibern8_enter(struct ufs_hba *hba) trace_ufshcd_profile_hibern8(dev_name(hba->dev), "enter", ktime_to_us(ktime_sub(ktime_get(), start)), ret); if (ret) { /* * Do full reinit if enter failed or if LINERESET was detected during * Hibern8 operation. After LINERESET, link moves to default PWM-G1 * mode hence full reinit is required to move link to HS speeds. */ if (ret || hba->full_init_linereset) { hba->full_init_linereset = false; ufshcd_update_error_stats(hba, UFS_ERR_HIBERN8_ENTER); dev_err(hba->dev, "%s: hibern8 enter failed. ret = %d", __func__, ret); Loading Loading @@ -4248,8 +4254,13 @@ int ufshcd_uic_hibern8_exit(struct ufs_hba *hba) ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd); trace_ufshcd_profile_hibern8(dev_name(hba->dev), "exit", ktime_to_us(ktime_sub(ktime_get(), start)), ret); if (ret) { /* * Do full reinit if exit failed or if LINERESET was detected during * Hibern8 operation. After LINERESET, link moves to default PWM-G1 * mode hence full reinit is required to move link to HS speeds. */ if (ret || hba->full_init_linereset) { hba->full_init_linereset = false; ufshcd_update_error_stats(hba, UFS_ERR_HIBERN8_EXIT); dev_err(hba->dev, "%s: hibern8 exit failed. ret = %d", __func__, ret); Loading Loading @@ -5900,9 +5911,8 @@ static void ufshcd_update_uic_error(struct ufs_hba *hba) /* PHY layer lane error */ reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER); /* Ignore LINERESET indication, as this is not an error */ if ((reg & UIC_PHY_ADAPTER_LAYER_ERROR) && (reg & UIC_PHY_ADAPTER_LAYER_LANE_ERR_MASK)) { (reg & UIC_PHY_ADAPTER_LAYER_ERROR_CODE_MASK)) { /* * To know whether this error is fatal or not, DB timeout * must be checked but this error is handled separately. Loading @@ -5910,6 +5920,20 @@ static void ufshcd_update_uic_error(struct ufs_hba *hba) dev_dbg(hba->dev, "%s: UIC Lane error reported, reg 0x%x\n", __func__, reg); ufshcd_update_uic_reg_hist(&hba->ufs_stats.pa_err, reg); /* Don't ignore LINERESET indication during hibern8 operation */ if (reg & UIC_PHY_ADAPTER_LAYER_GENERIC_ERROR) { struct uic_command *cmd = hba->active_uic_cmd; if (cmd) { if ((cmd->command == UIC_CMD_DME_HIBER_ENTER) || (cmd->command == UIC_CMD_DME_HIBER_EXIT)) { dev_err(hba->dev, "%s: LINERESET during hibern8, reg 0x%x\n", __func__, reg); hba->full_init_linereset = true; } } } } /* PA_INIT_ERROR is fatal and needs UIC reset */ Loading
drivers/scsi/ufs/ufshcd.h +2 −0 Original line number Diff line number Diff line Loading @@ -905,6 +905,8 @@ struct ufs_hba { bool no_ref_clk_gating; int scsi_block_reqs_cnt; bool full_init_linereset; }; static inline void ufshcd_mark_shutdown_ongoing(struct ufs_hba *hba) Loading
drivers/scsi/ufs/ufshci.h +1 −0 Original line number Diff line number Diff line Loading @@ -190,6 +190,7 @@ enum { /* UECPA - Host UIC Error Code PHY Adapter Layer 38h */ #define UIC_PHY_ADAPTER_LAYER_ERROR UFS_BIT(31) #define UIC_PHY_ADAPTER_LAYER_GENERIC_ERROR UFS_BIT(4) #define UIC_PHY_ADAPTER_LAYER_ERROR_CODE_MASK 0x1F #define UIC_PHY_ADAPTER_LAYER_LANE_ERR_MASK 0xF Loading