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Commit 58b61083 authored by Yaniv Gardi's avatar Yaniv Gardi Committed by David Keitel
Browse files

scsi: ufs-qcom: add support for new vendor specific registers 



The new UFS Controller (version 3.0.0) has a few changes compared to
previous versions, such as a new vendor specific register, and
different debug register offsets.

Change-Id: Idf455d2dcbdcdadcb1e809a8349fc9adbe9733dd
Signed-off-by: default avatarYaniv Gardi <ygardi@codeaurora.org>
parent ca45ac2d

drivers/scsi/ufs/ufs-qcom.c

+30 −22
Original line number Diff line number Diff line
@@ -1645,36 +1645,44 @@ void ufs_qcom_print_hw_debug_reg_all(struct ufs_hba *hba, void *priv, 
	if (!(host->dbg_print_en & UFS_QCOM_DBG_PRINT_REGS_EN))

		return;



	print_fn(hba, UFS_UFS_DBG_RD_REG_OCSC, 44,

			"UFS_UFS_DBG_RD_REG_OCSC ", priv);

	reg = ufs_qcom_get_debug_reg_offset(host, UFS_UFS_DBG_RD_REG_OCSC);

	print_fn(hba, reg, 44, "UFS_UFS_DBG_RD_REG_OCSC ", priv);



	reg = ufshcd_readl(hba, REG_UFS_CFG1);

	reg |= UFS_BIT(17);

	ufshcd_writel(hba, reg, REG_UFS_CFG1);



	print_fn(hba, UFS_UFS_DBG_RD_EDTL_RAM, 32,

			"UFS_UFS_DBG_RD_EDTL_RAM ", priv);

	print_fn(hba, UFS_UFS_DBG_RD_DESC_RAM, 128,

			"UFS_UFS_DBG_RD_DESC_RAM ", priv);

	print_fn(hba, UFS_UFS_DBG_RD_PRDT_RAM, 64,

			"UFS_UFS_DBG_RD_PRDT_RAM ", priv);

	reg = ufs_qcom_get_debug_reg_offset(host, UFS_UFS_DBG_RD_EDTL_RAM);

	print_fn(hba, reg, 32, "UFS_UFS_DBG_RD_EDTL_RAM ", priv);



	reg = ufs_qcom_get_debug_reg_offset(host, UFS_UFS_DBG_RD_DESC_RAM);

	print_fn(hba, reg, 128, "UFS_UFS_DBG_RD_DESC_RAM ", priv);



	reg = ufs_qcom_get_debug_reg_offset(host, UFS_UFS_DBG_RD_PRDT_RAM);

	print_fn(hba, reg, 64, "UFS_UFS_DBG_RD_PRDT_RAM ", priv);



	ufshcd_writel(hba, (reg & ~UFS_BIT(17)), REG_UFS_CFG1);



	print_fn(hba, UFS_DBG_RD_REG_UAWM, 4,

			"UFS_DBG_RD_REG_UAWM ", priv);

	print_fn(hba, UFS_DBG_RD_REG_UARM, 4,

			"UFS_DBG_RD_REG_UARM ", priv);

	print_fn(hba, UFS_DBG_RD_REG_TXUC, 48,

			"UFS_DBG_RD_REG_TXUC ", priv);

	print_fn(hba, UFS_DBG_RD_REG_RXUC, 27,

			"UFS_DBG_RD_REG_RXUC ", priv);

	print_fn(hba, UFS_DBG_RD_REG_DFC, 19,

			"UFS_DBG_RD_REG_DFC ", priv);

	print_fn(hba, UFS_DBG_RD_REG_TRLUT, 34,

			"UFS_DBG_RD_REG_TRLUT ", priv);

	print_fn(hba, UFS_DBG_RD_REG_TMRLUT, 9,

			"UFS_DBG_RD_REG_TMRLUT ", priv);

	reg = ufs_qcom_get_debug_reg_offset(host, UFS_DBG_RD_REG_UAWM);

	print_fn(hba, reg, 4, "UFS_DBG_RD_REG_UAWM ", priv);



	reg = ufs_qcom_get_debug_reg_offset(host, UFS_DBG_RD_REG_UARM);

	print_fn(hba, reg, 4, "UFS_DBG_RD_REG_UARM ", priv);



	reg = ufs_qcom_get_debug_reg_offset(host, UFS_DBG_RD_REG_TXUC);

	print_fn(hba, reg, 48, "UFS_DBG_RD_REG_TXUC ", priv);



	reg = ufs_qcom_get_debug_reg_offset(host, UFS_DBG_RD_REG_RXUC);

	print_fn(hba, reg, 27, "UFS_DBG_RD_REG_RXUC ", priv);



	reg = ufs_qcom_get_debug_reg_offset(host, UFS_DBG_RD_REG_DFC);

	print_fn(hba, reg, 19, "UFS_DBG_RD_REG_DFC ", priv);



	reg = ufs_qcom_get_debug_reg_offset(host, UFS_DBG_RD_REG_TRLUT);

	print_fn(hba, reg, 34, "UFS_DBG_RD_REG_TRLUT ", priv);



	reg = ufs_qcom_get_debug_reg_offset(host, UFS_DBG_RD_REG_TMRLUT);

	print_fn(hba, reg, 9, "UFS_DBG_RD_REG_TMRLUT ", priv);

}



static void ufs_qcom_enable_test_bus(struct ufs_qcom_host *host)

drivers/scsi/ufs/ufs-qcom.h

+22 −0
Original line number Diff line number Diff line
@@ -67,6 +67,16 @@ enum { 
	UFS_TEST_BUS_CTRL_2			= 0xF4,

	UFS_UNIPRO_CFG				= 0xF8,



	/*

	 * QCOM UFS host controller vendor specific registers

	 * added in HW Version 3.0.0

	 */

	UFS_AH8_CFG				= 0xFC,

};





/* QCOM UFS host controller vendor specific debug registers */

enum {

	UFS_DBG_RD_REG_UAWM			= 0x100,

	UFS_DBG_RD_REG_UARM			= 0x200,

	UFS_DBG_RD_REG_TXUC			= 0x300,
@@ -82,6 +92,9 @@ enum { 
	UFS_UFS_DBG_RD_EDTL_RAM			= 0x1900,

};



#define UFS_CNTLR_2_x_x_VEN_REGS_OFFSET(x)	(0x000 + x)

#define UFS_CNTLR_3_x_x_VEN_REGS_OFFSET(x)	(0x400 + x)



/* bit definitions for REG_UFS_CFG1 register */

#define QUNIPRO_SEL	UFS_BIT(0)

#define TEST_BUS_EN		BIT(18)
@@ -273,6 +286,15 @@ struct ufs_qcom_host { 
	struct ufs_qcom_testbus testbus;

};



static inline u32

ufs_qcom_get_debug_reg_offset(struct ufs_qcom_host *host, u32 reg)

{

	if (host->hw_ver.major <= 0x02)

		return UFS_CNTLR_2_x_x_VEN_REGS_OFFSET(reg);



	return UFS_CNTLR_3_x_x_VEN_REGS_OFFSET(reg);

};



#define ufs_qcom_is_link_off(hba) ufshcd_is_link_off(hba)

#define ufs_qcom_is_link_active(hba) ufshcd_is_link_active(hba)

#define ufs_qcom_is_link_hibern8(hba) ufshcd_is_link_hibern8(hba)