Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 55f9c40f authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc 

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc:
  n2_crypto: Attach on Niagara-T3.
  n2rng: Attach on Niagara-T3.
  sparc: Detect and handle UltraSPARC-T3 cpu types.
  sparc: Don't do expensive hypervisor PCR write unless necessary.
  sparc: Add T3 sun4v cpu type and hypervisor group defines.
  sparc: Don't leave sparc_pmu_type NULL on sun4v.
parents d5eab915 eb7caf35

arch/sparc/include/asm/elf_64.h

+4 −2
Original line number Diff line number Diff line
@@ -177,9 +177,11 @@ static inline unsigned int sparc64_elf_hwcap(void) 
		cap |= HWCAP_SPARC_ULTRA3;

	else if (tlb_type == hypervisor) {

		if (sun4v_chip_type == SUN4V_CHIP_NIAGARA1 ||

		    sun4v_chip_type == SUN4V_CHIP_NIAGARA2)

		    sun4v_chip_type == SUN4V_CHIP_NIAGARA2 ||

		    sun4v_chip_type == SUN4V_CHIP_NIAGARA3)

			cap |= HWCAP_SPARC_BLKINIT;

		if (sun4v_chip_type == SUN4V_CHIP_NIAGARA2)

		if (sun4v_chip_type == SUN4V_CHIP_NIAGARA2 ||

		    sun4v_chip_type == SUN4V_CHIP_NIAGARA3)

			cap |= HWCAP_SPARC_N2;

	}

arch/sparc/include/asm/hypervisor.h

+1 −0
Original line number Diff line number Diff line
@@ -2950,6 +2950,7 @@ extern unsigned long sun4v_ncs_request(unsigned long request, 
#define HV_GRP_N2_CPU			0x0202

#define HV_GRP_NIU			0x0204

#define HV_GRP_VF_CPU			0x0205

#define HV_GRP_KT_CPU			0x0209

#define HV_GRP_DIAG			0x0300



#ifndef __ASSEMBLY__

arch/sparc/include/asm/spitfire.h

+1 −0
Original line number Diff line number Diff line
@@ -42,6 +42,7 @@ 
#define SUN4V_CHIP_INVALID	0x00

#define SUN4V_CHIP_NIAGARA1	0x01

#define SUN4V_CHIP_NIAGARA2	0x02

#define SUN4V_CHIP_NIAGARA3	0x03

#define SUN4V_CHIP_UNKNOWN	0xff



#ifndef __ASSEMBLY__

arch/sparc/include/asm/xor_64.h

+2 −1
Original line number Diff line number Diff line
@@ -65,6 +65,7 @@ static struct xor_block_template xor_block_niagara = { 
#define XOR_SELECT_TEMPLATE(FASTEST) \

	((tlb_type == hypervisor && \

	  (sun4v_chip_type == SUN4V_CHIP_NIAGARA1 || \

	   sun4v_chip_type == SUN4V_CHIP_NIAGARA2)) ? \

	   sun4v_chip_type == SUN4V_CHIP_NIAGARA2 || \

	   sun4v_chip_type == SUN4V_CHIP_NIAGARA3)) ? \

	 &xor_block_niagara : \

	 &xor_block_VIS)

arch/sparc/kernel/cpu.c

+7 −0
Original line number Diff line number Diff line
@@ -474,11 +474,18 @@ static void __init sun4v_cpu_probe(void) 
		sparc_pmu_type = "niagara2";

		break;



	case SUN4V_CHIP_NIAGARA3:

		sparc_cpu_type = "UltraSparc T3 (Niagara3)";

		sparc_fpu_type = "UltraSparc T3 integrated FPU";

		sparc_pmu_type = "niagara3";

		break;



	default:

		printk(KERN_WARNING "CPU: Unknown sun4v cpu type [%s]\n",

		       prom_cpu_compatible);

		sparc_cpu_type = "Unknown SUN4V CPU";

		sparc_fpu_type = "Unknown SUN4V FPU";

		sparc_pmu_type = "Unknown SUN4V PMU";

		break;

	}

}