ARM: dts: msm: increase PCIe PHY wakeup delay from L1ss for msm8998

If PCIe controller requests exit from L1ss shortly after it brings
rxelecidle_disable high, then it's possible that the PHY pipe clock
will turn back on for a short period of time and then go back off
asychronously. Increase PCIe PHY PLL wakeup delay to avoid this.

Change-Id: I1cace039131879969112e1690d07a8d367c06c6b
Signed-off-by: Tony Truong <truong@codeaurora.org>