Loading fw/wmi_unified.h +20 −18 Original line number Diff line number Diff line Loading @@ -23887,8 +23887,8 @@ typedef struct { #define WMI_HECAP_MAC_AACK_SET_D3(he_cap, value) WMI_SET_BITS(he_cap, 17, 1, value) /* Set to 1 if the STA supports reception of the UL MU Response Scheduling A-Control field */ #define WMI_HECAP_MAC_ULMURSP_GET_D3(he_cap) WMI_GET_BITS(he_cap, 18, 1) #define WMI_HECAP_MAC_ULMURSP_SET_D3(he_cap, value) WMI_SET_BITS(he_cap, 18, 1, value) #define WMI_HECAP_MAC_TRS_GET_D3(he_cap) WMI_GET_BITS(he_cap, 18, 1) #define WMI_HECAP_MAC_TRS_SET_D3(he_cap, value) WMI_SET_BITS(he_cap, 18, 1, value) /* Set to 1 if the STA supports the BSR A-Control field functionality.*/ #define WMI_HECAP_MAC_BSR_GET_D3(he_cap) WMI_GET_BITS(he_cap, 19, 1) Loading @@ -23910,9 +23910,7 @@ typedef struct { #define WMI_HECAP_MAC_ACKMTIDAMPDU_GET_D3(he_cap) WMI_GET_BITS(he_cap, 23, 1) #define WMI_HECAP_MAC_ACKMTIDAMPDU_SET_D3(he_cap, value) WMI_SET_BITS(he_cap, 23, 1, value) /* Set to 1 when the STA supports its reception */ #define WMI_HECAP_MAC_GROUPMSTABA_GET_D3(he_cap) WMI_GET_BITS(he_cap, 24, 1) #define WMI_HECAP_MAC_GROUPMSTABA_SET_D3(he_cap, value) WMI_SET_BITS(he_cap, 24, 1, value) /* bit 24 - reserved */ /* Set to 1 if the STA supports reception of the OMI A-Control field */ #define WMI_HECAP_MAC_OMI_GET_D3(he_cap) WMI_GET_BITS(he_cap, 25, 1) Loading Loading @@ -23966,9 +23964,9 @@ typedef struct { #define WMI_HECAP_MAC_ABQR_GET_D3(he_cap2) WMI_GET_BITS(he_cap2, 2, 1) #define WMI_HECAP_MAC_ABQR_SET_D3(he_cap2, value) WMI_SET_BITS(he_cap2, 2, 1, value) /* Indicates support by the STA for the role of SR Responder.*/ #define WMI_HECAP_MAC_SRRESP_GET_D3(he_cap2) WMI_GET_BITS(he_cap2, 3, 1) #define WMI_HECAP_MAC_SRRESP_SET_D3(he_cap2, value) WMI_SET_BITS(he_cap2, 3, 1, value) /* Indicates support by the STA for the role of SRP Responder.*/ #define WMI_HECAP_MAC_SRPRESP_GET_D3(he_cap2) WMI_GET_BITS(he_cap2, 3, 1) #define WMI_HECAP_MAC_SRPRESP_SET_D3(he_cap2, value) WMI_SET_BITS(he_cap2, 3, 1, value) /* Indicates support for a non-AP STA to follow the NDP feedback report procedure and respond to * the NDP Feedback Report Poll Trigger frame. Loading Loading @@ -24086,10 +24084,10 @@ typedef struct { #define WMI_HECAP_PHY_BFMESTSLT80MHZ_SET WMI_HECAP_PHY_BFMESTSLT80MHZ_SET_D3 #define WMI_HECAP_PHY_BFMESTSGT80MHZ_GET WMI_HECAP_PHY_BFMESTSGT80MHZ_GET_D3 #define WMI_HECAP_PHY_BFMESTSGT80MHZ_SET WMI_HECAP_PHY_BFMESTSGT80MHZ_SET_D3 #define WMI_HECAP_PHY_NSTSLT80MHZ_GET WMI_HECAP_PHY_BFMESTSLT80MHZ_GET #define WMI_HECAP_PHY_NSTSLT80MHZ_SET WMI_HECAP_PHY_BFMESTSLT80MHZ_SET #define WMI_HECAP_PHY_NSTSGT80MHZ_GET WMI_HECAP_PHY_BFMESTSGT80MHZ_GET #define WMI_HECAP_PHY_NSTSGT80MHZ_SET WMI_HECAP_PHY_BFMESTSGT80MHZ_SET #define WMI_HECAP_PHY_NSTSLT80MHZ_GET WMI_HECAP_PHY_BFMESTSLT80MHZ_GET_D3 #define WMI_HECAP_PHY_NSTSLT80MHZ_SET WMI_HECAP_PHY_BFMESTSLT80MHZ_SET_D3 #define WMI_HECAP_PHY_NSTSGT80MHZ_GET WMI_HECAP_PHY_BFMESTSGT80MHZ_GET_D3 #define WMI_HECAP_PHY_NSTSGT80MHZ_SET WMI_HECAP_PHY_BFMESTSGT80MHZ_SET_D3 #define WMI_HECAP_PHY_NUMSOUNDLT80MHZ_GET WMI_HECAP_PHY_NUMSOUNDLT80MHZ_GET_D3 #define WMI_HECAP_PHY_NUMSOUNDLT80MHZ_SET WMI_HECAP_PHY_NUMSOUNDLT80MHZ_SET_D3 #define WMI_HECAP_PHY_NUMSOUNDGT80MHZ_GET WMI_HECAP_PHY_NUMSOUNDGT80MHZ_GET_D3 Loading Loading @@ -24172,8 +24170,10 @@ typedef struct { #define WMI_HECAP_MAC_HELINK_ADPT_SET WMI_HECAP_MAC_HELINK_ADPT_SET_D3 #define WMI_HECAP_MAC_AACK_GET WMI_HECAP_MAC_AACK_GET_D3 #define WMI_HECAP_MAC_AACK_SET WMI_HECAP_MAC_AACK_SET_D3 #define WMI_HECAP_MAC_ULMURSP_GET WMI_HECAP_MAC_ULMURSP_GET_D3 #define WMI_HECAP_MAC_ULMURSP_SET WMI_HECAP_MAC_ULMURSP_SET_D3 #define WMI_HECAP_MAC_TRS_GET WMI_HECAP_MAC_TRS_GET_D3 #define WMI_HECAP_MAC_TRS_SET WMI_HECAP_MAC_TRS_SET_D3 #define WMI_HECAP_MAC_ULMURSP_GET(he_cap) (0) /* DEPRECATED, DO NOT USE */ #define WMI_HECAP_MAC_ULMURSP_SET(he_cap, value) /* DEPRECATED, DO NOT USE */ #define WMI_HECAP_MAC_BSR_GET WMI_HECAP_MAC_BSR_GET_D3 #define WMI_HECAP_MAC_BSR_SET WMI_HECAP_MAC_BSR_SET_D3 #define WMI_HECAP_MAC_BCSTTWT_GET WMI_HECAP_MAC_BCSTTWT_GET_D3 Loading @@ -24184,8 +24184,8 @@ typedef struct { #define WMI_HECAP_MAC_MUCASCADE_SET WMI_HECAP_MAC_MUCASCADE_SET_D3 #define WMI_HECAP_MAC_ACKMTIDAMPDU_GET WMI_HECAP_MAC_ACKMTIDAMPDU_GET_D3 #define WMI_HECAP_MAC_ACKMTIDAMPDU_SET WMI_HECAP_MAC_ACKMTIDAMPDU_SET_D3 #define WMI_HECAP_MAC_GROUPMSTABA_GET WMI_HECAP_MAC_GROUPMSTABA_GET_D3 #define WMI_HECAP_MAC_GROUPMSTABA_SET WMI_HECAP_MAC_GROUPMSTABA_SET_D3 #define WMI_HECAP_MAC_GROUPMSTABA_GET(he_cap) (0) /* DEPRECATED, DO NOT USE */ #define WMI_HECAP_MAC_GROUPMSTABA_SET(he_cap, value) /* DEPRECATED, DO NOT USE */ #define WMI_HECAP_MAC_OMI_GET WMI_HECAP_MAC_OMI_GET_D3 #define WMI_HECAP_MAC_OMI_SET WMI_HECAP_MAC_OMI_SET_D3 #define WMI_HECAP_MAC_OFDMARA_GET WMI_HECAP_MAC_OFDMARA_GET_D3 Loading @@ -24204,8 +24204,10 @@ typedef struct { #define WMI_HECAP_MAC_QTP_SET WMI_HECAP_MAC_QTP_SET_D3 #define WMI_HECAP_MAC_ABQR_GET WMI_HECAP_MAC_ABQR_GET_D3 #define WMI_HECAP_MAC_ABQR_SET WMI_HECAP_MAC_ABQR_SET_D3 #define WMI_HECAP_MAC_SRRESP_GET WMI_HECAP_MAC_SRRESP_GET_D3 #define WMI_HECAP_MAC_SRRESP_SET WMI_HECAP_MAC_SRRESP_SET_D3 #define WMI_HECAP_MAC_SRPRESP_GET WMI_HECAP_MAC_SRPRESP_GET_D3 #define WMI_HECAP_MAC_SRPRESP_SET WMI_HECAP_MAC_SRPRESP_SET_D3 #define WMI_HECAP_MAC_SRRESP_GET(he_cap2) (0) /* DEPRECATED, DO NOT USE */ #define WMI_HECAP_MAC_SRRESP_SET(he_cap2, value) /* DEPRECATED, DO NOT USE */ #define WMI_HECAP_MAC_NDPFDBKRPT_GET WMI_HECAP_MAC_NDPFDBKRPT_GET_D3 #define WMI_HECAP_MAC_NDPFDBKRPT_SET WMI_HECAP_MAC_NDPFDBKRPT_SET_D3 #define WMI_HECAP_MAC_OPS_GET WMI_HECAP_MAC_OPS_GET_D3 fw/wmi_version.h +1 −1 Original line number Diff line number Diff line Loading @@ -36,7 +36,7 @@ #define __WMI_VER_MINOR_ 0 /** WMI revision number has to be incremented when there is a * change that may or may not break compatibility. */ #define __WMI_REVISION_ 566 #define __WMI_REVISION_ 567 /** The Version Namespace should not be normally changed. Only * host and firmware of the same WMI namespace will work Loading Loading
fw/wmi_unified.h +20 −18 Original line number Diff line number Diff line Loading @@ -23887,8 +23887,8 @@ typedef struct { #define WMI_HECAP_MAC_AACK_SET_D3(he_cap, value) WMI_SET_BITS(he_cap, 17, 1, value) /* Set to 1 if the STA supports reception of the UL MU Response Scheduling A-Control field */ #define WMI_HECAP_MAC_ULMURSP_GET_D3(he_cap) WMI_GET_BITS(he_cap, 18, 1) #define WMI_HECAP_MAC_ULMURSP_SET_D3(he_cap, value) WMI_SET_BITS(he_cap, 18, 1, value) #define WMI_HECAP_MAC_TRS_GET_D3(he_cap) WMI_GET_BITS(he_cap, 18, 1) #define WMI_HECAP_MAC_TRS_SET_D3(he_cap, value) WMI_SET_BITS(he_cap, 18, 1, value) /* Set to 1 if the STA supports the BSR A-Control field functionality.*/ #define WMI_HECAP_MAC_BSR_GET_D3(he_cap) WMI_GET_BITS(he_cap, 19, 1) Loading @@ -23910,9 +23910,7 @@ typedef struct { #define WMI_HECAP_MAC_ACKMTIDAMPDU_GET_D3(he_cap) WMI_GET_BITS(he_cap, 23, 1) #define WMI_HECAP_MAC_ACKMTIDAMPDU_SET_D3(he_cap, value) WMI_SET_BITS(he_cap, 23, 1, value) /* Set to 1 when the STA supports its reception */ #define WMI_HECAP_MAC_GROUPMSTABA_GET_D3(he_cap) WMI_GET_BITS(he_cap, 24, 1) #define WMI_HECAP_MAC_GROUPMSTABA_SET_D3(he_cap, value) WMI_SET_BITS(he_cap, 24, 1, value) /* bit 24 - reserved */ /* Set to 1 if the STA supports reception of the OMI A-Control field */ #define WMI_HECAP_MAC_OMI_GET_D3(he_cap) WMI_GET_BITS(he_cap, 25, 1) Loading Loading @@ -23966,9 +23964,9 @@ typedef struct { #define WMI_HECAP_MAC_ABQR_GET_D3(he_cap2) WMI_GET_BITS(he_cap2, 2, 1) #define WMI_HECAP_MAC_ABQR_SET_D3(he_cap2, value) WMI_SET_BITS(he_cap2, 2, 1, value) /* Indicates support by the STA for the role of SR Responder.*/ #define WMI_HECAP_MAC_SRRESP_GET_D3(he_cap2) WMI_GET_BITS(he_cap2, 3, 1) #define WMI_HECAP_MAC_SRRESP_SET_D3(he_cap2, value) WMI_SET_BITS(he_cap2, 3, 1, value) /* Indicates support by the STA for the role of SRP Responder.*/ #define WMI_HECAP_MAC_SRPRESP_GET_D3(he_cap2) WMI_GET_BITS(he_cap2, 3, 1) #define WMI_HECAP_MAC_SRPRESP_SET_D3(he_cap2, value) WMI_SET_BITS(he_cap2, 3, 1, value) /* Indicates support for a non-AP STA to follow the NDP feedback report procedure and respond to * the NDP Feedback Report Poll Trigger frame. Loading Loading @@ -24086,10 +24084,10 @@ typedef struct { #define WMI_HECAP_PHY_BFMESTSLT80MHZ_SET WMI_HECAP_PHY_BFMESTSLT80MHZ_SET_D3 #define WMI_HECAP_PHY_BFMESTSGT80MHZ_GET WMI_HECAP_PHY_BFMESTSGT80MHZ_GET_D3 #define WMI_HECAP_PHY_BFMESTSGT80MHZ_SET WMI_HECAP_PHY_BFMESTSGT80MHZ_SET_D3 #define WMI_HECAP_PHY_NSTSLT80MHZ_GET WMI_HECAP_PHY_BFMESTSLT80MHZ_GET #define WMI_HECAP_PHY_NSTSLT80MHZ_SET WMI_HECAP_PHY_BFMESTSLT80MHZ_SET #define WMI_HECAP_PHY_NSTSGT80MHZ_GET WMI_HECAP_PHY_BFMESTSGT80MHZ_GET #define WMI_HECAP_PHY_NSTSGT80MHZ_SET WMI_HECAP_PHY_BFMESTSGT80MHZ_SET #define WMI_HECAP_PHY_NSTSLT80MHZ_GET WMI_HECAP_PHY_BFMESTSLT80MHZ_GET_D3 #define WMI_HECAP_PHY_NSTSLT80MHZ_SET WMI_HECAP_PHY_BFMESTSLT80MHZ_SET_D3 #define WMI_HECAP_PHY_NSTSGT80MHZ_GET WMI_HECAP_PHY_BFMESTSGT80MHZ_GET_D3 #define WMI_HECAP_PHY_NSTSGT80MHZ_SET WMI_HECAP_PHY_BFMESTSGT80MHZ_SET_D3 #define WMI_HECAP_PHY_NUMSOUNDLT80MHZ_GET WMI_HECAP_PHY_NUMSOUNDLT80MHZ_GET_D3 #define WMI_HECAP_PHY_NUMSOUNDLT80MHZ_SET WMI_HECAP_PHY_NUMSOUNDLT80MHZ_SET_D3 #define WMI_HECAP_PHY_NUMSOUNDGT80MHZ_GET WMI_HECAP_PHY_NUMSOUNDGT80MHZ_GET_D3 Loading Loading @@ -24172,8 +24170,10 @@ typedef struct { #define WMI_HECAP_MAC_HELINK_ADPT_SET WMI_HECAP_MAC_HELINK_ADPT_SET_D3 #define WMI_HECAP_MAC_AACK_GET WMI_HECAP_MAC_AACK_GET_D3 #define WMI_HECAP_MAC_AACK_SET WMI_HECAP_MAC_AACK_SET_D3 #define WMI_HECAP_MAC_ULMURSP_GET WMI_HECAP_MAC_ULMURSP_GET_D3 #define WMI_HECAP_MAC_ULMURSP_SET WMI_HECAP_MAC_ULMURSP_SET_D3 #define WMI_HECAP_MAC_TRS_GET WMI_HECAP_MAC_TRS_GET_D3 #define WMI_HECAP_MAC_TRS_SET WMI_HECAP_MAC_TRS_SET_D3 #define WMI_HECAP_MAC_ULMURSP_GET(he_cap) (0) /* DEPRECATED, DO NOT USE */ #define WMI_HECAP_MAC_ULMURSP_SET(he_cap, value) /* DEPRECATED, DO NOT USE */ #define WMI_HECAP_MAC_BSR_GET WMI_HECAP_MAC_BSR_GET_D3 #define WMI_HECAP_MAC_BSR_SET WMI_HECAP_MAC_BSR_SET_D3 #define WMI_HECAP_MAC_BCSTTWT_GET WMI_HECAP_MAC_BCSTTWT_GET_D3 Loading @@ -24184,8 +24184,8 @@ typedef struct { #define WMI_HECAP_MAC_MUCASCADE_SET WMI_HECAP_MAC_MUCASCADE_SET_D3 #define WMI_HECAP_MAC_ACKMTIDAMPDU_GET WMI_HECAP_MAC_ACKMTIDAMPDU_GET_D3 #define WMI_HECAP_MAC_ACKMTIDAMPDU_SET WMI_HECAP_MAC_ACKMTIDAMPDU_SET_D3 #define WMI_HECAP_MAC_GROUPMSTABA_GET WMI_HECAP_MAC_GROUPMSTABA_GET_D3 #define WMI_HECAP_MAC_GROUPMSTABA_SET WMI_HECAP_MAC_GROUPMSTABA_SET_D3 #define WMI_HECAP_MAC_GROUPMSTABA_GET(he_cap) (0) /* DEPRECATED, DO NOT USE */ #define WMI_HECAP_MAC_GROUPMSTABA_SET(he_cap, value) /* DEPRECATED, DO NOT USE */ #define WMI_HECAP_MAC_OMI_GET WMI_HECAP_MAC_OMI_GET_D3 #define WMI_HECAP_MAC_OMI_SET WMI_HECAP_MAC_OMI_SET_D3 #define WMI_HECAP_MAC_OFDMARA_GET WMI_HECAP_MAC_OFDMARA_GET_D3 Loading @@ -24204,8 +24204,10 @@ typedef struct { #define WMI_HECAP_MAC_QTP_SET WMI_HECAP_MAC_QTP_SET_D3 #define WMI_HECAP_MAC_ABQR_GET WMI_HECAP_MAC_ABQR_GET_D3 #define WMI_HECAP_MAC_ABQR_SET WMI_HECAP_MAC_ABQR_SET_D3 #define WMI_HECAP_MAC_SRRESP_GET WMI_HECAP_MAC_SRRESP_GET_D3 #define WMI_HECAP_MAC_SRRESP_SET WMI_HECAP_MAC_SRRESP_SET_D3 #define WMI_HECAP_MAC_SRPRESP_GET WMI_HECAP_MAC_SRPRESP_GET_D3 #define WMI_HECAP_MAC_SRPRESP_SET WMI_HECAP_MAC_SRPRESP_SET_D3 #define WMI_HECAP_MAC_SRRESP_GET(he_cap2) (0) /* DEPRECATED, DO NOT USE */ #define WMI_HECAP_MAC_SRRESP_SET(he_cap2, value) /* DEPRECATED, DO NOT USE */ #define WMI_HECAP_MAC_NDPFDBKRPT_GET WMI_HECAP_MAC_NDPFDBKRPT_GET_D3 #define WMI_HECAP_MAC_NDPFDBKRPT_SET WMI_HECAP_MAC_NDPFDBKRPT_SET_D3 #define WMI_HECAP_MAC_OPS_GET WMI_HECAP_MAC_OPS_GET_D3
fw/wmi_version.h +1 −1 Original line number Diff line number Diff line Loading @@ -36,7 +36,7 @@ #define __WMI_VER_MINOR_ 0 /** WMI revision number has to be incremented when there is a * change that may or may not break compatibility. */ #define __WMI_REVISION_ 566 #define __WMI_REVISION_ 567 /** The Version Namespace should not be normally changed. Only * host and firmware of the same WMI namespace will work Loading