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Commit 4b3061b3 authored by Peter Ujfalusi's avatar Peter Ujfalusi Committed by Tero Kristo
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clk: ti: clk-7xx: Remove hardwired ABE clock configuration 



The ABE related clocks should be configured via DT and not have it wired
inside of the kernel.

Fixes: a74c52de ("clk: ti: clk-7xx: Correct ABE DPLL configuration")
Signed-off-by: default avatarPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: default avatarTero Kristo <t-kristo@ti.com>
parent 9ffecb10

drivers/clk/ti/clk-7xx.c

+1 −17
Original line number Original line Diff line number Diff line
@@ -18,7 +18,6 @@ 




#include "clock.h"

#include "clock.h"





#define DRA7_DPLL_ABE_DEFFREQ				180633600

#define DRA7_DPLL_GMAC_DEFFREQ				1000000000

#define DRA7_DPLL_GMAC_DEFFREQ				1000000000

#define DRA7_DPLL_USB_DEFFREQ				960000000

#define DRA7_DPLL_USB_DEFFREQ				960000000
@@ -313,27 +312,12 @@ static struct ti_dt_clk dra7xx_clks[] = { 
int __init dra7xx_dt_clk_init(void)

int __init dra7xx_dt_clk_init(void)

{

{

	int rc;

	int rc;

	struct clk *abe_dpll_mux, *sys_clkin2, *dpll_ck, *hdcp_ck;

	struct clk *dpll_ck, *hdcp_ck;





	ti_dt_clocks_register(dra7xx_clks);

	ti_dt_clocks_register(dra7xx_clks);





	omap2_clk_disable_autoidle_all();

	omap2_clk_disable_autoidle_all();





	abe_dpll_mux = clk_get_sys(NULL, "abe_dpll_sys_clk_mux");

	sys_clkin2 = clk_get_sys(NULL, "sys_clkin2");

	dpll_ck = clk_get_sys(NULL, "dpll_abe_ck");



	rc = clk_set_parent(abe_dpll_mux, sys_clkin2);

	if (!rc)

		rc = clk_set_rate(dpll_ck, DRA7_DPLL_ABE_DEFFREQ);

	if (rc)

		pr_err("%s: failed to configure ABE DPLL!\n", __func__);



	dpll_ck = clk_get_sys(NULL, "dpll_abe_m2x2_ck");

	rc = clk_set_rate(dpll_ck, DRA7_DPLL_ABE_DEFFREQ * 2);

	if (rc)

		pr_err("%s: failed to configure ABE DPLL m2x2!\n", __func__);



	dpll_ck = clk_get_sys(NULL, "dpll_gmac_ck");

	dpll_ck = clk_get_sys(NULL, "dpll_gmac_ck");

	rc = clk_set_rate(dpll_ck, DRA7_DPLL_GMAC_DEFFREQ);

	rc = clk_set_rate(dpll_ck, DRA7_DPLL_GMAC_DEFFREQ);

	if (rc)

	if (rc)