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Commit 49c60547 authored by Charles Keepax's avatar Charles Keepax Committed by Mark Brown
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ASoC: arizona: Improve handling of setting REFCLK to 0 



This patch suppresses calculation of REFCLK parameters when the REFCLK
source frequency is set to zero, additionally it will consider a source
frequency of zero as the REFCLK being disabled and switch to using the
SYNCCLK.

Reported-by: default avatarKyung Kwee Ryu <Kyung-Kwee.Ryu@wolfsonmicro.com>
Signed-off-by: default avatarCharles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: default avatarMark Brown <broonie@linaro.org>
parent 272b98c6

sound/soc/codecs/arizona.c

+14 −9
Original line number Original line Diff line number Diff line
@@ -1477,21 +1477,25 @@ static void arizona_enable_fll(struct arizona_fll *fll, 
{

{

	struct arizona *arizona = fll->arizona;

	struct arizona *arizona = fll->arizona;

	int ret;

	int ret;

	bool use_sync = false;





	/*

	/*

	 * If we have both REFCLK and SYNCCLK then enable both,

	 * If we have both REFCLK and SYNCCLK then enable both,

	 * otherwise apply the SYNCCLK settings to REFCLK.

	 * otherwise apply the SYNCCLK settings to REFCLK.

	 */

	 */

	if (fll->ref_src >= 0 && fll->ref_src != fll->sync_src) {

	if (fll->ref_src >= 0 && fll->ref_freq &&

	    fll->ref_src != fll->sync_src) {

		regmap_update_bits(arizona->regmap, fll->base + 5,

		regmap_update_bits(arizona->regmap, fll->base + 5,

				   ARIZONA_FLL1_OUTDIV_MASK,

				   ARIZONA_FLL1_OUTDIV_MASK,

				   ref->outdiv << ARIZONA_FLL1_OUTDIV_SHIFT);

				   ref->outdiv << ARIZONA_FLL1_OUTDIV_SHIFT);





		arizona_apply_fll(arizona, fll->base, ref, fll->ref_src,

		arizona_apply_fll(arizona, fll->base, ref, fll->ref_src,

				  false);

				  false);

		if (fll->sync_src >= 0)

		if (fll->sync_src >= 0) {

			arizona_apply_fll(arizona, fll->base + 0x10, sync,

			arizona_apply_fll(arizona, fll->base + 0x10, sync,

					  fll->sync_src, true);

					  fll->sync_src, true);

			use_sync = true;

		}

	} else if (fll->sync_src >= 0) {

	} else if (fll->sync_src >= 0) {

		regmap_update_bits(arizona->regmap, fll->base + 5,

		regmap_update_bits(arizona->regmap, fll->base + 5,

				   ARIZONA_FLL1_OUTDIV_MASK,

				   ARIZONA_FLL1_OUTDIV_MASK,
@@ -1511,7 +1515,7 @@ static void arizona_enable_fll(struct arizona_fll *fll, 
	 * Increase the bandwidth if we're not using a low frequency

	 * Increase the bandwidth if we're not using a low frequency

	 * sync source.

	 * sync source.

	 */

	 */

	if (fll->sync_src >= 0 && fll->sync_freq > 100000)

	if (use_sync && fll->sync_freq > 100000)

		regmap_update_bits(arizona->regmap, fll->base + 0x17,

		regmap_update_bits(arizona->regmap, fll->base + 0x17,

				   ARIZONA_FLL1_SYNC_BW, 0);

				   ARIZONA_FLL1_SYNC_BW, 0);

	else

	else
@@ -1526,8 +1530,7 @@ static void arizona_enable_fll(struct arizona_fll *fll, 




	regmap_update_bits(arizona->regmap, fll->base + 1,

	regmap_update_bits(arizona->regmap, fll->base + 1,

			   ARIZONA_FLL1_ENA, ARIZONA_FLL1_ENA);

			   ARIZONA_FLL1_ENA, ARIZONA_FLL1_ENA);

	if (fll->ref_src >= 0 && fll->sync_src >= 0 &&

	if (use_sync)

	    fll->ref_src != fll->sync_src)

		regmap_update_bits(arizona->regmap, fll->base + 0x11,

		regmap_update_bits(arizona->regmap, fll->base + 0x11,

				   ARIZONA_FLL1_SYNC_ENA,

				   ARIZONA_FLL1_SYNC_ENA,

				   ARIZONA_FLL1_SYNC_ENA);

				   ARIZONA_FLL1_SYNC_ENA);
@@ -1561,10 +1564,12 @@ int arizona_set_fll_refclk(struct arizona_fll *fll, int source, 
	if (fll->ref_src == source && fll->ref_freq == Fref)

	if (fll->ref_src == source && fll->ref_freq == Fref)

		return 0;

		return 0;





	if (fll->fout && Fref > 0) {

	if (fll->fout) {

		if (Fref > 0) {

			ret = arizona_calc_fll(fll, &ref, Fref, fll->fout);

			ret = arizona_calc_fll(fll, &ref, Fref, fll->fout);

			if (ret != 0)

			if (ret != 0)

				return ret;

				return ret;

		}





		if (fll->sync_src >= 0) {

		if (fll->sync_src >= 0) {

			ret = arizona_calc_fll(fll, &sync, fll->sync_freq,

			ret = arizona_calc_fll(fll, &sync, fll->sync_freq,