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Commit 48f731aa authored by Vijayavardhan Vennapusa's avatar Vijayavardhan Vennapusa
Browse files

ARM: dts: msm: Add QMP PHY init sequence for msmfalcon 



Add required QMP PHY initialization sequence for msmfalcon for
USB SS mode working.

Change-Id: I14a9f7a1079956efcb3b31ffeca1235a62856bf5
Signed-off-by: default avatarVijayavardhan Vennapusa <vvreddy@codeaurora.org>
parent a80e267a

arch/arm/boot/dts/qcom/msmfalcon-common.dtsi

+104 −0
Original line number Diff line number Diff line
@@ -179,6 +179,110 @@ 
		qcom,vdd-voltage-level = <0 925000 925000>;

		vdd-core-voltage-level = <0 1800000 1800000>;

		qcom,vbus-valid-override;

		qcom,qmp-phy-init-seq =

			/* <reg_offset, value, delay> */

				<0xac  0x14 0x00

				 0x34  0x08 0x00

				 0x174 0x30 0x00

				 0x3c  0x06 0x00

				 0xbc  0x00 0x00

				 0xc0  0x08 0x00

				 0x194 0x06 0x00

				 0x19c 0x01 0x00

				 0x178 0x00 0x00

				 0xd0  0x82 0x00

				 0xdc  0x55 0x00

				 0xe0  0x55 0x00

				 0xe4  0x03 0x00

				 0x78  0x0b 0x00

				 0x84  0x16 0x00

				 0x90  0x28 0x00

				 0x108 0x80 0x00

				 0x10c 0x00 0x00

				 0x184 0x0a 0x00

				 0x4c  0x15 0x00

				 0x50  0x34 0x00

				 0x54  0x00 0x00

				 0xc8  0x00 0x00

				 0x18c 0x00 0x00

				 0xcc  0x00 0x00

				 0x128 0x00 0x00

				 0x0c  0x0a 0x00

				 0x10  0x01 0x00

				 0x1c  0x31 0x00

				 0x20  0x01 0x00

				 0x14  0x00 0x00

				 0x18  0x00 0x00

				 0x24  0xde 0x00

				 0x28  0x07 0x00

				 0x48  0x0f 0x00

				 0x70  0x0f 0x00

				 0x100 0x80 0x00

				 0xa8  0x01 0x00

				 0x430 0x0b 0x00

				 0x830 0x0b 0x00

				 0x444 0x00 0x00

				 0x844 0x00 0x00

				 0x43c 0x00 0x00

				 0x83c 0x00 0x00

				 0x440 0x00 0x00

				 0x840 0x00 0x00

				 0x408 0x0a 0x00

				 0x808 0x0a 0x00

				 0x414 0x06 0x00

				 0x814 0x06 0x00

				 0x434 0x75 0x00

				 0x834 0x75 0x00

				 0x4d4 0x02 0x00

				 0x8d4 0x02 0x00

				 0x4d8 0x4e 0x00

				 0x8d8 0x4e 0x00

				 0x4dc 0x18 0x00

				 0x8dc 0x18 0x00

				 0x4f8 0x77 0x00

				 0x8f8 0x77 0x00

				 0x4fc 0x80 0x00

				 0x8fc 0x80 0x00

				 0x4c0 0x0a 0x00

				 0x8c0 0x0a 0x00

				 0x504 0x03 0x00

				 0x904 0x03 0x00

				 0x50c 0x16 0x00

				 0x90c 0x16 0x00

				 0x500 0x00 0x00

				 0x900 0x00 0x00

				 0x260 0x10 0x00

				 0x660 0x10 0x00

				 0x2a4 0x12 0x00

				 0x6a4 0x12 0x00

				 0x28c 0xc6 0x00

				 0x68c 0xc6 0x00

				 0x244 0x00 0x00

				 0x644 0x00 0x00

				 0x248 0x00 0x00

				 0x648 0x00 0x00

				 0xc0c 0x9f 0x00

				 0xc24 0x17 0x00

				 0xc28 0x0f 0x00

				 0xcc8 0x83 0x00

				 0xcc4 0x02 0x00

				 0xccc 0x09 0x00

				 0xcd0 0xa2 0x00

				 0xcd4 0x85 0x00

				 0xc80 0xd1 0x00

				 0xc84 0x1f 0x00

				 0xc88 0x47 0x00

				 0xcb8 0x75 0x00

				 0xcbc 0x13 0x00

				 0xcb0 0x86 0x00

				 0xca0 0x04 0x00

				 0xc8c 0x44 0x00

				 0xc70 0xe7 0x00

				 0xc74 0x03 0x00

				 0xc78 0x40 0x00

				 0xc7c 0x00 0x00

				 0xdd8 0x88 0x00

				 0xffffffff 0xffffffff 0x00>;



		qcom,qmp-phy-reg-offset =

				<0xd74 /* USB3_PHY_PCS_STATUS */