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Commit 47855693 authored by Srinivasarao P's avatar Srinivasarao P
Browse files

Merge android-4.4.189 (74c82193) into msm-4.4 



* refs/heads/tmp-74c82193
  Linux 4.4.189
  x86/speculation/swapgs: Exclude ATOMs from speculation through SWAPGS
  x86/entry/64: Use JMP instead of JMPQ
  x86/speculation: Enable Spectre v1 swapgs mitigations
  x86/speculation: Prepare entry code for Spectre v1 swapgs mitigations
  x86/entry/64: Fix context tracking state warning when load_gs_index fails
  x86: cpufeatures: Sort feature word 7
  spi: bcm2835: Fix 3-wire mode if DMA is enabled
  block: blk_init_allocated_queue() set q->fq as NULL in the fail case
  compat_ioctl: pppoe: fix PPPOEIOCSFWD handling
  bnx2x: Disable multi-cos feature.
  net/mlx5: Use reversed order when unregister devices
  net: sched: Fix a possible null-pointer dereference in dequeue_func()
  tipc: compat: allow tipc commands without arguments
  net: fix ifindex collision during namespace removal
  net: bridge: delete local fdb on device init failure
  atm: iphase: Fix Spectre v1 vulnerability
  tcp: be more careful in tcp_fragment()
  HID: Add quirk for HP X1200 PIXART OEM mouse
  netfilter: nfnetlink_acct: validate NFACCT_QUOTA parameter
  arm64: cpufeature: Fix feature comparison for CTR_EL0.{CWG,ERG}
  arm64: cpufeature: Fix CTR_EL0 field definitions
  UPSTREAM: net-ipv6-ndisc: add support for RFC7710 RA Captive Portal Identifier

Change-Id: I0bdf89783d0c83a3385d77f6b4c6f3d3b3fb0460
Signed-off-by: default avatarSrinivasarao P <spathi@codeaurora.org>
parents 7b0c4ab6 74c82193

Documentation/kernel-parameters.txt

+4 −3
Original line number Diff line number Diff line
@@ -2235,6 +2235,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted. 
				improves system performance, but it may also

				expose users to several CPU vulnerabilities.

				Equivalent to: nopti [X86]

					       nospectre_v1 [X86]

					       nospectre_v2 [X86]

					       spectre_v2_user=off [X86]

					       spec_store_bypass_disable=off [X86]
@@ -2568,9 +2569,9 @@ bytes respectively. Such letter suffixes can also be entirely omitted. 


	nohugeiomap	[KNL,x86] Disable kernel huge I/O mappings.



	nospectre_v1	[PPC] Disable mitigations for Spectre Variant 1 (bounds

			check bypass). With this option data leaks are possible

			in the system.

	nospectre_v1	[X86,PPC] Disable mitigations for Spectre Variant 1

			(bounds check bypass). With this option data leaks are

			possible in the system.



	nospectre_v2	[X86,PPC_FSL_BOOK3E] Disable all mitigations for the Spectre variant 2

			(indirect branch prediction) vulnerability. System may

Makefile

+1 −1
Original line number Diff line number Diff line 
VERSION = 4

PATCHLEVEL = 4

SUBLEVEL = 188

SUBLEVEL = 189

EXTRAVERSION =

NAME = Blurry Fish Butt

arch/arm64/include/asm/cpufeature.h

+4 −3
Original line number Diff line number Diff line
@@ -52,6 +52,7 @@ enum ftr_type { 
	FTR_EXACT,			/* Use a predefined safe value */

	FTR_LOWER_SAFE,			/* Smaller value is safe */

	FTR_HIGHER_SAFE,		/* Bigger value is safe */

	FTR_HIGHER_OR_ZERO_SAFE,	/* Bigger value is safe, but 0 is biggest */

};



#define FTR_STRICT	true	/* SANITY check strict matching required */

arch/arm64/kernel/cpufeature.c

+10 −4
Original line number Diff line number Diff line
@@ -139,10 +139,12 @@ static struct arm64_ftr_bits ftr_id_aa64mmfr2[] = { 
};



static struct arm64_ftr_bits ftr_ctr[] = {

	U_ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, 31, 1, 1),	/* RAO */

	ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, 28, 3, 0),

	U_ARM64_FTR_BITS(FTR_STRICT, FTR_HIGHER_SAFE, 24, 4, 0),	/* CWG */

	U_ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, 20, 4, 0),	/* ERG */

	U_ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, 31, 1, 1),	/* RES1 */

	ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, 30, 1, 0),

	U_ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, 29, 1, 1),	/* DIC */

	U_ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, 28, 1, 1),	/* IDC */

	U_ARM64_FTR_BITS(FTR_STRICT, FTR_HIGHER_OR_ZERO_SAFE, 24, 4, 0),	/* CWG */

	U_ARM64_FTR_BITS(FTR_STRICT, FTR_HIGHER_OR_ZERO_SAFE, 20, 4, 0),	/* ERG */

	U_ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, 16, 4, 1),	/* DminLine */

	/*

	 * Linux can handle differing I-cache policies. Userspace JITs will
@@ -353,6 +355,10 @@ static s64 arm64_ftr_safe_value(struct arm64_ftr_bits *ftrp, s64 new, s64 cur) 
	case FTR_LOWER_SAFE:

		ret = new < cur ? new : cur;

		break;

	case FTR_HIGHER_OR_ZERO_SAFE:

		if (!cur || !new)

			break;

		/* Fallthrough */

	case FTR_HIGHER_SAFE:

		ret = new > cur ? new : cur;

		break;

arch/x86/entry/calling.h

+19 −0
Original line number Diff line number Diff line 
#include <asm/cpufeatures.h>



/*



 x86 function call convention, 64-bit:
@@ -199,6 +201,23 @@ For 32-bit we have the following conventions - kernel is built with 
	.byte 0xf1

	.endm



/*

 * Mitigate Spectre v1 for conditional swapgs code paths.

 *

 * FENCE_SWAPGS_USER_ENTRY is used in the user entry swapgs code path, to

 * prevent a speculative swapgs when coming from kernel space.

 *

 * FENCE_SWAPGS_KERNEL_ENTRY is used in the kernel entry non-swapgs code path,

 * to prevent the swapgs from getting speculatively skipped when coming from

 * user space.

 */

.macro FENCE_SWAPGS_USER_ENTRY

	ALTERNATIVE "", "lfence", X86_FEATURE_FENCE_SWAPGS_USER

.endm

.macro FENCE_SWAPGS_KERNEL_ENTRY

	ALTERNATIVE "", "lfence", X86_FEATURE_FENCE_SWAPGS_KERNEL

.endm



#else /* CONFIG_X86_64 */



/*