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Commit 472a6d1f authored by Thierry Reding's avatar Thierry Reding
Browse files

drm/tegra: dc: Rename BASE_COLOR_SIZE* fields 



Use an underscore to separate the prefix from the color size suffix.

Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 76ac3284

drivers/gpu/drm/tegra/dc.h

+9 −0
Original line number Diff line number Diff line
@@ -250,6 +250,15 @@ 
#define DITHER_CONTROL_DISABLE (0 << 8)

#define DITHER_CONTROL_ORDERED (2 << 8)

#define DITHER_CONTROL_ERRDIFF (3 << 8)

#define BASE_COLOR_SIZE_666    (0 << 0)

#define BASE_COLOR_SIZE_111    (1 << 0)

#define BASE_COLOR_SIZE_222    (2 << 0)

#define BASE_COLOR_SIZE_333    (3 << 0)

#define BASE_COLOR_SIZE_444    (4 << 0)

#define BASE_COLOR_SIZE_555    (5 << 0)

#define BASE_COLOR_SIZE_565    (6 << 0)

#define BASE_COLOR_SIZE_332    (7 << 0)

#define BASE_COLOR_SIZE_888    (8 << 0)



#define DC_DISP_SHIFT_CLOCK_OPTIONS		0x431

#define  SC1_H_QUALIFIER_NONE	(1 << 16)

drivers/gpu/drm/tegra/hdmi.c

+1 −1
Original line number Diff line number Diff line
@@ -872,7 +872,7 @@ static void tegra_hdmi_encoder_mode_set(struct drm_encoder *encoder, 


	tegra_dc_writel(dc, VSYNC_H_POSITION(1),

			DC_DISP_DISP_TIMING_OPTIONS);

	tegra_dc_writel(dc, DITHER_CONTROL_DISABLE | BASE_COLOR_SIZE888,

	tegra_dc_writel(dc, DITHER_CONTROL_DISABLE | BASE_COLOR_SIZE_888,

			DC_DISP_DISP_COLOR_CONTROL);



	/* video_preamble uses h_pulse2 */