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Commit 46d5cedd authored by Emil Tantilov's avatar Emil Tantilov Committed by Jeff Kirsher
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ixgbe: add support for disabling link at boot time on 82599 



This patch adds support for disabling link during boot time. This
feature was requested by customers and is configurable through the EEPROM.

Signed-off-by: default avatarEmil Tantilov <emil.s.tantilov@intel.com>
Tested-by: default avatarPhil Schmitt <phillip.j.schmitt@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent 5e82f2f0

drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c

+19 −2
Original line number Diff line number Diff line
@@ -1051,6 +1051,14 @@ mac_reset_top: 
	 */

	hw->mac.cached_autoc = IXGBE_READ_REG(hw, IXGBE_AUTOC);

	autoc2 = IXGBE_READ_REG(hw, IXGBE_AUTOC2);



	/* Enable link if disabled in NVM */

	if (autoc2 & IXGBE_AUTOC2_LINK_DISABLE_MASK) {

		autoc2 &= ~IXGBE_AUTOC2_LINK_DISABLE_MASK;

		IXGBE_WRITE_REG(hw, IXGBE_AUTOC2, autoc2);

		IXGBE_WRITE_FLUSH(hw);

	}



	if (hw->mac.orig_link_settings_stored == false) {

		hw->mac.orig_autoc = hw->mac.cached_autoc;

		hw->mac.orig_autoc2 = autoc2;
@@ -2186,8 +2194,17 @@ static s32 ixgbe_read_eeprom_82599(struct ixgbe_hw *hw, 
 **/

s32 ixgbe_reset_pipeline_82599(struct ixgbe_hw *hw)

{

	s32 i, autoc_reg, ret_val;

	s32 anlp1_reg = 0;

	s32 ret_val;

	u32 anlp1_reg = 0;

	u32 i, autoc_reg, autoc2_reg;



	/* Enable link if disabled in NVM */

	autoc2_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC2);

	if (autoc2_reg & IXGBE_AUTOC2_LINK_DISABLE_MASK) {

		autoc2_reg &= ~IXGBE_AUTOC2_LINK_DISABLE_MASK;

		IXGBE_WRITE_REG(hw, IXGBE_AUTOC2, autoc2_reg);

		IXGBE_WRITE_FLUSH(hw);

	}



	autoc_reg = hw->mac.cached_autoc;

	autoc_reg |= IXGBE_AUTOC_AN_RESTART;

drivers/net/ethernet/intel/ixgbe/ixgbe_type.h

+1 −0
Original line number Diff line number Diff line
@@ -1593,6 +1593,7 @@ enum { 
#define IXGBE_AUTOC2_10G_KR  (0x0 << IXGBE_AUTOC2_10G_SERIAL_PMA_PMD_SHIFT)

#define IXGBE_AUTOC2_10G_XFI (0x1 << IXGBE_AUTOC2_10G_SERIAL_PMA_PMD_SHIFT)

#define IXGBE_AUTOC2_10G_SFI (0x2 << IXGBE_AUTOC2_10G_SERIAL_PMA_PMD_SHIFT)

#define IXGBE_AUTOC2_LINK_DISABLE_MASK        0x70000000



#define IXGBE_MACC_FLU       0x00000001

#define IXGBE_MACC_FSV_10G   0x00030000