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Commit 41c0b3a8 authored by Ben Widawsky's avatar Ben Widawsky Committed by Daniel Vetter
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drm/i915: Implement WaVSRefCountFullforceMissDisable 



Implements WaVSRefCountFullforceMissDisable as documented in the BSpec
3D workarounds chapter.

Cc: Paulo Zanoni <przanoni@gmail.com>
Signed-off-by: default avatarBen Widawsky <ben@bwidawsk.net>
Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent cb10799c

drivers/gpu/drm/i915/i915_reg.h

+1 −0
Original line number Diff line number Diff line
@@ -741,6 +741,7 @@ 
#define   GEN7_FF_TS_SCHED_HS0		(0x3<<16)

#define   GEN7_FF_TS_SCHED_LOAD_BALANCE	(0x1<<16)

#define   GEN7_FF_TS_SCHED_HW		(0x0<<16) /* Default */

#define   GEN7_FF_VS_REF_CNT_FFME	(1 << 15)

#define   GEN7_FF_VS_SCHED_HS1		(0x5<<12)

#define   GEN7_FF_VS_SCHED_HS0		(0x3<<12)

#define   GEN7_FF_VS_SCHED_LOAD_BALANCE	(0x1<<12) /* Default */

drivers/gpu/drm/i915/intel_pm.c

+4 −0
Original line number Diff line number Diff line
@@ -3680,6 +3680,10 @@ static void gen7_setup_fixed_func_scheduler(struct drm_i915_private *dev_priv) 
	reg |= GEN7_FF_VS_SCHED_HW;

	reg |= GEN7_FF_DS_SCHED_HW;



	/* WaVSRefCountFullforceMissDisable */

	if (IS_HASWELL(dev_priv->dev))

		reg &= ~GEN7_FF_VS_REF_CNT_FFME;



	I915_WRITE(GEN7_FF_THREAD_MODE, reg);

}