Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 41750481 authored by Samyukta Mogily's avatar Samyukta Mogily
Browse files

ARM: dts: msm: Update camera clock sources for sdm660 



Changing the clock source frequencies to lower
working frequencies so that the camera runs in
SVS_L1 mode, which reduces the power consumption.

Change-Id: I92344fcd0f4492badd6a50c011b0aa8b4231a373
Signed-off-by: default avatarSamyukta Mogily <smogily@codeaurora.org>
parent 336e2455

arch/arm/boot/dts/qcom/sdm660-camera.dtsi

+10 −10
Original line number Diff line number Diff line
@@ -54,8 +54,8 @@ 
			"csiphy_timer_src_clk", "csiphy_timer_clk",

			"camss_ispif_ahb_clk", "csiphy_clk_src", "csiphy_clk",

			"csiphy_ahb2crif";

		qcom,clock-rates = <0 0 0 0 0 0 384000000 0 0 269333333 0

			0 384000000 0 0>;

		qcom,clock-rates = <0 0 0 0 0 0 310000000 0 0 269333333 0

			0 200000000 0 0>;

		status = "ok";

	};
@@ -92,8 +92,8 @@ 
			"csiphy_timer_src_clk", "csiphy_timer_clk",

			"camss_ispif_ahb_clk", "csiphy_clk_src", "csiphy_clk",

			"csiphy_ahb2crif";

		qcom,clock-rates = <0 0 0 0 0 0 384000000 0 0 269333333 0

			0 384000000 0 0>;

		qcom,clock-rates = <0 0 0 0 0 0 310000000 0 0 269333333 0

			0 200000000 0 0>;

		status = "ok";

	};
@@ -130,8 +130,8 @@ 
			"csiphy_timer_src_clk", "csiphy_timer_clk",

			"camss_ispif_ahb_clk", "csiphy_clk_src", "csiphy_clk",

			"csiphy_ahb2crif";

		qcom,clock-rates = <0 0 0 0 0 0 384000000 0 0 269333333 0

			0 384000000 0 0>;

		qcom,clock-rates = <0 0 0 0 0 0 310000000 0 0 269333333 0

			0 200000000 0 0>;

		status = "ok";

	};
@@ -171,7 +171,7 @@ 
			"ispif_ahb_clk", "csi_src_clk", "csiphy_clk_src",

			"csi_clk", "csi_ahb_clk", "csi_rdi_clk",

			"csi_pix_clk", "cphy_csid_clk";

		qcom,clock-rates = <0 0 0 0 0 0 0 384000000 384000000

		qcom,clock-rates = <0 0 0 0 0 0 0 310000000 200000000

			0 0 0 0 0>;

		status = "ok";

	};
@@ -212,7 +212,7 @@ 
			"ispif_ahb_clk", "csi_src_clk", "csiphy_clk_src",

			"csi_clk", "csi_ahb_clk", "csi_rdi_clk",

			"csi_pix_clk", "cphy_csid_clk";

		qcom,clock-rates = <0 0 0 0 0 0 0 256000000 256000000

		qcom,clock-rates = <0 0 0 0 0 0 0 310000000 200000000

			 0 0 0 0 0>;

		status = "ok";

	};
@@ -253,7 +253,7 @@ 
			"ispif_ahb_clk", "csi_src_clk", "csiphy_clk_src",

			"csi_clk", "csi_ahb_clk", "csi_rdi_clk",

			"csi_pix_clk", "cphy_csid_clk";

		qcom,clock-rates = <0 0 0 0 0 0 0 256000000 256000000

		qcom,clock-rates = <0 0 0 0 0 0 0 310000000 200000000

			 0 0 0 0 0>;

		status = "ok";

	};
@@ -294,7 +294,7 @@ 
			"ispif_ahb_clk", "csi_src_clk", "csiphy_clk_src",

			"csi_clk", "csi_ahb_clk", "csi_rdi_clk",

			"csi_pix_clk", "cphy_csid_clk";

		qcom,clock-rates = <0 0 0 0 0 0 0 256000000 256000000

		qcom,clock-rates = <0 0 0 0 0 0 0 310000000 200000000

			 0 0 0 0 0>;

		status = "ok";

	};