Merge tag 'renesas-simple-pm-bus-for-v4.1' of...

Renesas Bus State Controller (BSC)

==================================

The Renesas Bus State Controller (BSC, sometimes called "LBSC within Bus

Bridge", or "External Bus Interface") can be found in several Renesas ARM SoCs.

It provides an external bus for connecting multiple external devices to the

SoC, driving several chip select lines, for e.g. NOR FLASH, Ethernet and USB.

While the BSC is a fairly simple memory-mapped bus, it may be part of a PM

domain, and may have a gateable functional clock.

Before a device connected to the BSC can be accessed, the PM domain

containing the BSC must be powered on, and the functional clock

driving the BSC must be enabled.

The bindings for the BSC extend the bindings for "simple-pm-bus".

Required properties

  - compatible: Must contain an SoC-specific value, and "renesas,bsc" and

		"simple-pm-bus" as fallbacks.

                SoC-specific values can be:

		"renesas,bsc-r8a73a4" for R-Mobile APE6 (r8a73a4)

		"renesas,bsc-sh73a0" for SH-Mobile AG5 (sh73a0)

  - #address-cells, #size-cells, ranges: Must describe the mapping between

		parent address and child address spaces.

  - reg: Must contain the base address and length to access the bus controller.

Optional properties:

  - interrupts: Must contain a reference to the BSC interrupt, if available.

  - clocks: Must contain a reference to the functional clock, if available.

  - power-domains: Must contain a reference to the PM domain, if available.

Example:

	bsc: bus@fec10000 {

		compatible = "renesas,bsc-sh73a0", "renesas,bsc",

			     "simple-pm-bus";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges = <0 0 0x20000000>;

		reg = <0xfec10000 0x400>;

		interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&zb_clk>;

		power-domains = <&pd_a4s>;

	};

Simple Power-Managed Bus

========================

A Simple Power-Managed Bus is a transparent bus that doesn't need a real

driver, as it's typically initialized by the boot loader.

However, its bus controller is part of a PM domain, or under the control of a

functional clock.  Hence, the bus controller's PM domain and/or clock must be

enabled for child devices connected to the bus (either on-SoC or externally)

to function.

While "simple-pm-bus" follows the "simple-bus" set of properties, as specified

in ePAPR, it is not an extension of "simple-bus".

Required properties:

  - compatible: Must contain at least "simple-pm-bus".

		Must not contain "simple-bus".

		It's recommended to let this be preceded by one or more

		vendor-specific compatible values.

  - #address-cells, #size-cells, ranges: Must describe the mapping between

		parent address and child address spaces.

Optional platform-specific properties for clock or PM domain control (at least

one of them is required):

  - clocks: Must contain a reference to the functional clock(s),

  - power-domains: Must contain a reference to the PM domain.

Please refer to the binding documentation for the clock and/or PM domain

providers for more details.

Example:

	bsc: bus@fec10000 {

		compatible = "renesas,bsc-sh73a0", "renesas,bsc",

			     "simple-pm-bus";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges = <0 0 0x20000000>;

		reg = <0xfec10000 0x400>;

		interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&zb_clk>;

		power-domains = <&pd_a4s>;

	};

menu "Bus devices"

config ARM_CCI

	bool "ARM CCI driver support"

	depends on ARM && OF && CPU_V7

	help

	  Driver supporting the CCI cache coherent interconnect for ARM

	  platforms.

config ARM_CCN

	bool "ARM CCN driver support"

	depends on ARM || ARM64

	depends on PERF_EVENTS

	help

	  PMU (perf) driver supporting the ARM CCN (Cache Coherent Network)

	  interconnect.

config BRCMSTB_GISB_ARB

	bool "Broadcom STB GISB bus arbiter"

	depends on ARM || MIPS

	  Driver needed for the MBus configuration on Marvell EBU SoCs

	  (Kirkwood, Dove, Orion5x, MV78XX0 and Armada 370/XP).

config OMAP_OCP2SCP

	tristate "OMAP OCP2SCP DRIVER"

	depends on ARCH_OMAP2PLUS

	help

	  Driver to enable ocp2scp module which transforms ocp interface

	  protocol to scp protocol. In OMAP4, USB PHY is connected via

	  OCP2SCP and in OMAP5, both USB PHY and SATA PHY is connected via

	  OCP2SCP.

config OMAP_INTERCONNECT

	tristate "OMAP INTERCONNECT DRIVER"

	depends on ARCH_OMAP2PLUS

	help

	  Driver to enable OMAP interconnect error handling driver.

config ARM_CCI

	bool "ARM CCI driver support"

	depends on ARM && OF && CPU_V7

config OMAP_OCP2SCP

	tristate "OMAP OCP2SCP DRIVER"

	depends on ARCH_OMAP2PLUS

	help

	  Driver supporting the CCI cache coherent interconnect for ARM

	  platforms.

	  Driver to enable ocp2scp module which transforms ocp interface

	  protocol to scp protocol. In OMAP4, USB PHY is connected via

	  OCP2SCP and in OMAP5, both USB PHY and SATA PHY is connected via

	  OCP2SCP.

config ARM_CCN

	bool "ARM CCN driver support"

	depends on ARM || ARM64

	depends on PERF_EVENTS

config SIMPLE_PM_BUS

	bool "Simple Power-Managed Bus Driver"

	depends on OF && PM

	depends on ARCH_SHMOBILE || COMPILE_TEST

	help

	  PMU (perf) driver supporting the ARM CCN (Cache Coherent Network)

	  interconnect.

	  Driver for transparent busses that don't need a real driver, but

	  where the bus controller is part of a PM domain, or under the control

	  of a functional clock, and thus relies on runtime PM for managing

	  this PM domain and/or clock.

	  An example of such a bus controller is the Renesas Bus State

	  Controller (BSC, sometimes called "LBSC within Bus Bridge", or

	  "External Bus Interface") as found on several Renesas ARM SoCs.

config VEXPRESS_CONFIG

	bool "Versatile Express configuration bus"

# Makefile for the bus drivers.

#

# Interconnect bus drivers for ARM platforms

obj-$(CONFIG_ARM_CCI)		+= arm-cci.o

obj-$(CONFIG_ARM_CCN)		+= arm-ccn.o

obj-$(CONFIG_BRCMSTB_GISB_ARB)	+= brcmstb_gisb.o

obj-$(CONFIG_IMX_WEIM)		+= imx-weim.o

obj-$(CONFIG_MVEBU_MBUS) 	+= mvebu-mbus.o

obj-$(CONFIG_OMAP_OCP2SCP)	+= omap-ocp2scp.o

# Interconnect bus driver for OMAP SoCs.

obj-$(CONFIG_OMAP_INTERCONNECT)	+= omap_l3_smx.o omap_l3_noc.o

# Interconnect bus drivers for ARM platforms

obj-$(CONFIG_ARM_CCI)		+= arm-cci.o

obj-$(CONFIG_ARM_CCN)		+= arm-ccn.o

obj-$(CONFIG_OMAP_OCP2SCP)	+= omap-ocp2scp.o

obj-$(CONFIG_SIMPLE_PM_BUS)	+= simple-pm-bus.o

obj-$(CONFIG_VEXPRESS_CONFIG)	+= vexpress-config.o

/*

 * Simple Power-Managed Bus Driver

 *

 * Copyright (C) 2014-2015 Glider bvba

 *

 * This file is subject to the terms and conditions of the GNU General Public

 * License.  See the file "COPYING" in the main directory of this archive

 * for more details.

 */

#include <linux/module.h>

#include <linux/of_platform.h>

#include <linux/platform_device.h>

#include <linux/pm_runtime.h>

static int simple_pm_bus_probe(struct platform_device *pdev)

{

	struct device_node *np = pdev->dev.of_node;

	dev_dbg(&pdev->dev, "%s\n", __func__);

	pm_runtime_enable(&pdev->dev);

	if (np)

		of_platform_populate(np, NULL, NULL, &pdev->dev);

	return 0;

}

static int simple_pm_bus_remove(struct platform_device *pdev)

{

	dev_dbg(&pdev->dev, "%s\n", __func__);

	pm_runtime_disable(&pdev->dev);

	return 0;

}

static const struct of_device_id simple_pm_bus_of_match[] = {

	{ .compatible = "simple-pm-bus", },

	{ /* sentinel */ }

};

MODULE_DEVICE_TABLE(of, simple_pm_bus_of_match);

static struct platform_driver simple_pm_bus_driver = {

	.probe = simple_pm_bus_probe,

	.remove = simple_pm_bus_remove,

	.driver = {

		.name = "simple-pm-bus",

		.of_match_table = simple_pm_bus_of_match,

	},

};

module_platform_driver(simple_pm_bus_driver);

MODULE_DESCRIPTION("Simple Power-Managed Bus Driver");

MODULE_AUTHOR("Geert Uytterhoeven <geert+renesas@glider.be>");

MODULE_LICENSE("GPL v2");