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Commit 3eeebf17 authored by Paul Mundt's avatar Paul Mundt
Browse files

sh: Kill off long-dead HD64465 cchip support. 



This code has been dead for many years. The last update it received
was in 2003 in order to update it for the driver model changes, though
it had already been in disarray and unused before that point. The only
boards that ever used this chip have not had users in many years either,
so it is finally safe to just kill it off and move on with life.

Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent 5ff0594e

Documentation/sh/new-machine.txt

+1 −3
Original line number Diff line number Diff line
@@ -47,9 +47,7 @@ Next, for companion chips: 
    `-- sh

        `-- cchips

            `-- hd6446x

                |-- hd64461

                |   `-- cchip-specific files

                `-- hd64465

                `-- hd64461

                    `-- cchip-specific files



... and so on. Headers for the companion chips are treated the same way as

arch/sh/cchips/Kconfig

+0 −33
Original line number Diff line number Diff line
@@ -22,20 +22,6 @@ config HD64461 
	  Say Y if you want support for the HD64461.

	  Otherwise, say N.



config HD64465

	bool "Hitachi HD64465 companion chip support"

	---help---

	  The Hitachi HD64465 provides an interface for

	  the SH7750 CPU, supporting a LCD controller,

	  CRT color controller, IrDA, USB, PCMCIA,

	  keyboard controller, and a printer interface.



	  More information is available at

	  <http://global.hitachi.com/New/cnews/E/1998/981019B.html>.



	  Say Y if you want support for the HD64465.

	  Otherwise, say N.



endchoice



# These will also be split into the Kconfig's below
@@ -61,23 +47,4 @@ config HD64461_ENABLER 
	  via the HD64461 companion chip.

	  Otherwise, say N.



config HD64465_IOBASE

	hex "HD64465 start address"

	depends on HD64465

	default "0xb0000000"

	help

	  The default setting of the HD64465 IO base address is 0xb0000000.



	  Do not change this unless you know what you are doing.



config HD64465_IRQ

	int "HD64465 IRQ"

	depends on HD64465

	default "5"

	help

	  The default setting of the HD64465 IRQ is 5.



	  Do not change this unless you know what you are doing.



endmenu

arch/sh/cchips/hd6446x/Makefile

+0 −1
Original line number Diff line number Diff line 
obj-$(CONFIG_HD64461)	+= hd64461.o

obj-$(CONFIG_HD64465)	+= hd64465/



EXTRA_CFLAGS += -Werror

arch/sh/cchips/hd6446x/hd64465/Makefile

deleted100644 → 0
+0 −6
Original line number Diff line number Diff line 
#

# Makefile for the HD64465

#



obj-y	 := setup.o io.o gpio.o

arch/sh/cchips/hd6446x/hd64465/gpio.c

deleted100644 → 0
+0 −196
Original line number Diff line number Diff line 
/*

 * $Id: gpio.c,v 1.4 2003/05/19 22:24:18 lethal Exp $

 * by Greg Banks <gbanks@pocketpenguins.com>

 * (c) 2000 PocketPenguins Inc

 *

 * GPIO pin support for HD64465 companion chip.

 */



#include <linux/kernel.h>

#include <linux/init.h>

#include <linux/module.h>

#include <linux/sched.h>

#include <linux/ioport.h>

#include <asm/io.h>

#include <asm/hd64465/gpio.h>



#define _PORTOF(portpin)    (((portpin)>>3)&0x7)

#define _PINOF(portpin)     ((portpin)&0x7)



/* Register addresses parametrised on port */

#define GPIO_CR(port)	    (HD64465_REG_GPACR+((port)<<1))

#define GPIO_DR(port)	    (HD64465_REG_GPADR+((port)<<1))

#define GPIO_ICR(port)	    (HD64465_REG_GPAICR+((port)<<1))

#define GPIO_ISR(port)	    (HD64465_REG_GPAISR+((port)<<1))



#define GPIO_NPORTS 5



#define MODNAME "hd64465_gpio"



EXPORT_SYMBOL(hd64465_gpio_configure);

EXPORT_SYMBOL(hd64465_gpio_get_pin);

EXPORT_SYMBOL(hd64465_gpio_get_port);

EXPORT_SYMBOL(hd64465_gpio_register_irq);

EXPORT_SYMBOL(hd64465_gpio_set_pin);

EXPORT_SYMBOL(hd64465_gpio_set_port);

EXPORT_SYMBOL(hd64465_gpio_unregister_irq);



/* TODO: each port should be protected with a spinlock */





void hd64465_gpio_configure(int portpin, int direction)

{

    	unsigned short cr;

	unsigned int shift = (_PINOF(portpin)<<1);



	cr = inw(GPIO_CR(_PORTOF(portpin)));

	cr &= ~(3<<shift);

	cr |= direction<<shift;

	outw(cr, GPIO_CR(_PORTOF(portpin)));

}



void hd64465_gpio_set_pin(int portpin, unsigned int value)

{

    	unsigned short d;

	unsigned short mask = 1<<(_PINOF(portpin));

	

	d = inw(GPIO_DR(_PORTOF(portpin)));

	if (value)

	    d |= mask;

	else

	    d &= ~mask;

	outw(d, GPIO_DR(_PORTOF(portpin)));

}



unsigned int hd64465_gpio_get_pin(int portpin)

{

	return inw(GPIO_DR(_PORTOF(portpin))) & (1<<(_PINOF(portpin)));

}



/* TODO: for cleaner atomicity semantics, add a mask to this routine */



void hd64465_gpio_set_port(int port, unsigned int value)

{

	outw(value, GPIO_DR(port));

}



unsigned int hd64465_gpio_get_port(int port)

{

	return inw(GPIO_DR(port));

}





static struct {

    void (*func)(int portpin, void *dev);

    void *dev;

} handlers[GPIO_NPORTS * 8];



static irqreturn_t hd64465_gpio_interrupt(int irq, void *dev)

{

    	unsigned short port, pin, isr, mask, portpin;

	

	for (port=0 ; port<GPIO_NPORTS ; port++) {

	    isr = inw(GPIO_ISR(port));

	    

	    for (pin=0 ; pin<8 ; pin++) {

	    	mask = 1<<pin;

	    	if (isr & mask) {

		    portpin = (port<<3)|pin;

		    if (handlers[portpin].func != 0)

		    	handlers[portpin].func(portpin, handlers[portpin].dev);

    	    	    else

		    	printk(KERN_NOTICE "unexpected GPIO interrupt, pin %c%d\n",

			    port+'A', (int)pin);

		}

	    }

	    

	    /* Write 1s back to ISR to clear it?  That's what the manual says.. */

	    outw(isr, GPIO_ISR(port));

	}



	return IRQ_HANDLED;

}



void hd64465_gpio_register_irq(int portpin, int mode,

	void (*handler)(int portpin, void *dev), void *dev)

{

    	unsigned long flags;

	unsigned short icr, mask;



	if (handler == 0)

	    return;

	    

	local_irq_save(flags);

	

	handlers[portpin].func = handler;

	handlers[portpin].dev = dev;



    	/*

	 * Configure Interrupt Control Register

	 */

	icr = inw(GPIO_ICR(_PORTOF(portpin)));

	mask = (1<<_PINOF(portpin));

	

	/* unmask interrupt */

	icr &= ~mask;

	

	/* set TS bit */

	mask <<= 8;

	icr &= ~mask;

	if (mode == HD64465_GPIO_RISING)

	    icr |= mask;

	    

	outw(icr, GPIO_ICR(_PORTOF(portpin)));



	local_irq_restore(flags);

}



void hd64465_gpio_unregister_irq(int portpin)

{

    	unsigned long flags;

	unsigned short icr;

	

	local_irq_save(flags);



    	/*

	 * Configure Interrupt Control Register

	 */

	icr = inw(GPIO_ICR(_PORTOF(portpin)));

	icr |= (1<<_PINOF(portpin));	/* mask interrupt */

	outw(icr, GPIO_ICR(_PORTOF(portpin)));



	handlers[portpin].func = 0;

	handlers[portpin].dev = 0;

	

	local_irq_restore(flags);

}



static int __init hd64465_gpio_init(void)

{

	if (!request_region(HD64465_REG_GPACR, 0x1000, MODNAME))

		return -EBUSY;

	if (request_irq(HD64465_IRQ_GPIO, hd64465_gpio_interrupt,

	    		IRQF_DISABLED, MODNAME, 0))

		goto out_irqfailed;



    	printk("HD64465 GPIO layer on irq %d\n", HD64465_IRQ_GPIO);



	return 0;



out_irqfailed:

	release_region(HD64465_REG_GPACR, 0x1000);



	return -EINVAL;

}



static void __exit hd64465_gpio_exit(void)

{

    	release_region(HD64465_REG_GPACR, 0x1000);

	free_irq(HD64465_IRQ_GPIO, 0);

}



module_init(hd64465_gpio_init);

module_exit(hd64465_gpio_exit);



MODULE_LICENSE("GPL");