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Commit 3ee7a976 authored by Narender Ankam's avatar Narender Ankam Committed by Gerrit - the friendly Code Review server
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msm: mdss: hdmi: reset TMDS_Bit_Clock_Ratio bit 



When TMDS clock rate is lte 340MHz and downstream
sink doesn't support LTE_340MHz_scramble, reset
TMDS_Bit_Clock_Ratio bit in the sink.

Change-Id: Ib5a60c17d78e0c70071bec93e5081419d21bddd0
Signed-off-by: default avatarNarender Ankam <nankam@codeaurora.org>
parent a2864d55

drivers/video/fbdev/msm/mdss_hdmi_panel.c

+9 −0
Original line number Diff line number Diff line
@@ -797,6 +797,15 @@ static int hdmi_panel_setup_scrambler(struct hdmi_panel *panel) 
		rc = hdmi_setup_ddc_timers(panel->ddc,

			HDMI_TX_DDC_TIMER_SCRAMBLER_STATUS, timeout_hsync);

	} else {

		tmds_clock_ratio = 0;

		rc = hdmi_scdc_write(panel->ddc,

			HDMI_TX_SCDC_TMDS_BIT_CLOCK_RATIO_UPDATE,

			tmds_clock_ratio);

		if (rc) {

			pr_err("TMDS CLK RATIO ERR\n");

			return rc;

		}



		hdmi_scdc_write(panel->ddc,

			HDMI_TX_SCDC_SCRAMBLING_ENABLE, 0x0);