Commit 3c92c2ba authored Oct 11, 2005 by Andi Kleen Committed by Linus Torvalds Oct 10, 2005

[PATCH] i386: Don't discard upper 32bits of HWCR on K8



Need to use long long, not long when RMWing a MSR. I think
it's harmless right now, but still should be better fixed
if AMD adds any bits in the upper 32bit of HWCR.

Bug was introduced with the TLB flush filter fix for i386

Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

parent 421c7ce6

arch/i386/kernel/cpu/amd.c

+1 −1

Original line number	Original line	Diff line number	Diff line
	@@ -29,7 +29,7 @@ static void __init init_amd(struct cpuinfo_x86 *c)
	int r;		int r;

	#ifdef CONFIG_SMP		#ifdef CONFIG_SMP
	unsigned long value;		unsigned long long value;

	/* Disable TLB flush filter by setting HWCR.FFDIS on K8		/* Disable TLB flush filter by setting HWCR.FFDIS on K8
	* bit 6 of msr C001_0015		* bit 6 of msr C001_0015