Loading arch/arm/boot/dts/qcom/vplatform-lfv-msm8996-modem.dtsi +6 −6 Original line number Diff line number Diff line Loading @@ -105,13 +105,13 @@ "halt_nc", "rmb_base", "restart_reg"; clocks = <&clock_gcc clk_cxo_clk_src>, <&clock_gcc clk_gcc_mss_cfg_ahb_clk>, <&clock_virt clk_gcc_mss_cfg_ahb_clk>, <&clock_gcc clk_pnoc_clk>, <&clock_gcc clk_gcc_mss_q6_bimc_axi_clk>, <&clock_gcc clk_gcc_boot_rom_ahb_clk>, <&clock_gcc clk_gpll0_out_msscc>, <&clock_gcc clk_gcc_mss_snoc_axi_clk>, <&clock_gcc clk_gcc_mss_mnoc_bimc_axi_clk>, <&clock_virt clk_gcc_mss_q6_bimc_axi_clk>, <&clock_virt clk_gcc_boot_rom_ahb_clk>, <&clock_virt clk_gpll0_out_msscc>, <&clock_virt clk_gcc_mss_snoc_axi_clk>, <&clock_virt clk_gcc_mss_mnoc_bimc_axi_clk>, <&clock_gcc clk_qdss_clk>; clock-names = "xo", "iface_clk", "pnoc_clk", "bus_clk", "mem_clk", "gpll0_mss_clk", "snoc_axi_clk", Loading arch/arm/boot/dts/qcom/vplatform-lfv-smmu.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -33,7 +33,7 @@ <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>; vdd-supply = <&gdsc_hlos1_vote_lpass_adsp>; clocks = <&clock_gcc clk_hlos1_vote_lpass_adsp_smmu_clk>; clocks = <&clock_virt clk_hlos1_vote_lpass_adsp_smmu_clk>; clock-names = "lpass_q6_smmu_clocks"; #clock-cells = <1>; }; Loading Loading
arch/arm/boot/dts/qcom/vplatform-lfv-msm8996-modem.dtsi +6 −6 Original line number Diff line number Diff line Loading @@ -105,13 +105,13 @@ "halt_nc", "rmb_base", "restart_reg"; clocks = <&clock_gcc clk_cxo_clk_src>, <&clock_gcc clk_gcc_mss_cfg_ahb_clk>, <&clock_virt clk_gcc_mss_cfg_ahb_clk>, <&clock_gcc clk_pnoc_clk>, <&clock_gcc clk_gcc_mss_q6_bimc_axi_clk>, <&clock_gcc clk_gcc_boot_rom_ahb_clk>, <&clock_gcc clk_gpll0_out_msscc>, <&clock_gcc clk_gcc_mss_snoc_axi_clk>, <&clock_gcc clk_gcc_mss_mnoc_bimc_axi_clk>, <&clock_virt clk_gcc_mss_q6_bimc_axi_clk>, <&clock_virt clk_gcc_boot_rom_ahb_clk>, <&clock_virt clk_gpll0_out_msscc>, <&clock_virt clk_gcc_mss_snoc_axi_clk>, <&clock_virt clk_gcc_mss_mnoc_bimc_axi_clk>, <&clock_gcc clk_qdss_clk>; clock-names = "xo", "iface_clk", "pnoc_clk", "bus_clk", "mem_clk", "gpll0_mss_clk", "snoc_axi_clk", Loading
arch/arm/boot/dts/qcom/vplatform-lfv-smmu.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -33,7 +33,7 @@ <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>; vdd-supply = <&gdsc_hlos1_vote_lpass_adsp>; clocks = <&clock_gcc clk_hlos1_vote_lpass_adsp_smmu_clk>; clocks = <&clock_virt clk_hlos1_vote_lpass_adsp_smmu_clk>; clock-names = "lpass_q6_smmu_clocks"; #clock-cells = <1>; }; Loading