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Commit 37c26a90 authored by Prashant Gaikwad's avatar Prashant Gaikwad Committed by Stephen Warren
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clk: tegra: add clock support for Tegra20 



Add Tegra20 clock support based on common clock framework.

Signed-off-by: default avatarPrashant Gaikwad <pgaikwad@nvidia.com>
[swarren: s/1GHz/100MHz/ in call to tegra_clk_plle() to fix PCIe,
implemented KBC clock, ensure all OF lookups return valid cookies i.e.
an explicit error pointer or valid pointer not NULL, adapt to renames
in earlier patches, fixed some checkpatch issues.]
Acked-by: default avatarMike Turquette <mturquette@linaro.org>
Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
parent 8f8f484b

drivers/clk/tegra/Makefile

+2 −0
Original line number Diff line number Diff line
@@ -6,3 +6,5 @@ obj-y += clk-periph-gate.o 
obj-y					+= clk-pll.o

obj-y					+= clk-pll-out.o

obj-y					+= clk-super.o



obj-$(CONFIG_ARCH_TEGRA_2x_SOC)         += clk-tegra20.o

drivers/clk/tegra/clk-tegra20.c

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+1273 −0

File added.

Preview size limit exceeded, changes collapsed.

drivers/clk/tegra/clk.h

+6 −0
Original line number Diff line number Diff line
@@ -487,4 +487,10 @@ void tegra_init_from_table(struct tegra_clk_init_table *tbl, 
void tegra_init_dup_clks(struct tegra_clk_duplicate *dup_list,

		struct clk *clks[], int clk_max);



#ifdef CONFIG_ARCH_TEGRA_2x_SOC

void tegra20_clock_init(struct device_node *np);

#else

static inline void tegra20_clock_init(struct device_node *np) {}

#endif /* CONFIG_ARCH_TEGRA_2x_SOC */



#endif /* TEGRA_CLK_H */