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Commit 3555e53b authored by Alex Deucher's avatar Alex Deucher Committed by Dave Airlie
Browse files

drm/radeon/kms: leave certain CP int bits enabled 



These bits are used for internal communication and should
be left enabled.  This may fix s/r issues on some systems.

Signed-off-by: default avatarAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent c919b371

drivers/gpu/drm/radeon/evergreen.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -1521,7 +1521,7 @@ void evergreen_disable_interrupt_state(struct radeon_device *rdev) 
{

{

	u32 tmp;

	u32 tmp;





	WREG32(CP_INT_CNTL, 0);

	WREG32(CP_INT_CNTL, CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE);

	WREG32(GRBM_INT_CNTL, 0);

	WREG32(GRBM_INT_CNTL, 0);

	WREG32(INT_MASK + EVERGREEN_CRTC0_REGISTER_OFFSET, 0);

	WREG32(INT_MASK + EVERGREEN_CRTC0_REGISTER_OFFSET, 0);

	WREG32(INT_MASK + EVERGREEN_CRTC1_REGISTER_OFFSET, 0);

	WREG32(INT_MASK + EVERGREEN_CRTC1_REGISTER_OFFSET, 0);

drivers/gpu/drm/radeon/r600.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -2912,7 +2912,7 @@ static void r600_disable_interrupt_state(struct radeon_device *rdev) 
{

{

	u32 tmp;

	u32 tmp;





	WREG32(CP_INT_CNTL, 0);

	WREG32(CP_INT_CNTL, CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE);

	WREG32(GRBM_INT_CNTL, 0);

	WREG32(GRBM_INT_CNTL, 0);

	WREG32(DxMODE_INT_MASK, 0);

	WREG32(DxMODE_INT_MASK, 0);

	if (ASIC_IS_DCE3(rdev)) {

	if (ASIC_IS_DCE3(rdev)) {