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Commit 34f6d2c9 authored by Mark Brown's avatar Mark Brown
Browse files

Merge tag 'v4.4.1' into linux-linaro-lsk-v4.4 

This is the 4.4.1 stable release

# gpg: Signature made Sun 31 Jan 2016 19:29:43 GMT using RSA key ID 6092693E
# gpg: Good signature from "Greg Kroah-Hartman (Linux kernel stable release signing key) <greg@kroah.com>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 647F 2865 4894 E3BD 4571  99BE 38DB BDC8 6092 693E
parents afd2ff9b f1ab5eaf

Documentation/ABI/testing/sysfs-bus-usb

+9 −7
Original line number Diff line number Diff line
@@ -134,19 +134,21 @@ Description: 
		enabled for the device. Developer can write y/Y/1 or n/N/0 to

		the file to enable/disable the feature.



What:		/sys/bus/usb/devices/.../power/usb3_hardware_lpm

Date:		June 2015

What:		/sys/bus/usb/devices/.../power/usb3_hardware_lpm_u1

		/sys/bus/usb/devices/.../power/usb3_hardware_lpm_u2

Date:		November 2015

Contact:	Kevin Strasser <kevin.strasser@linux.intel.com>

		Lu Baolu <baolu.lu@linux.intel.com>

Description:

		If CONFIG_PM is set and a USB 3.0 lpm-capable device is plugged

		in to a xHCI host which supports link PM, it will check if U1

		and U2 exit latencies have been set in the BOS descriptor; if

		the check is is passed and the host supports USB3 hardware LPM,

		the check is passed and the host supports USB3 hardware LPM,

		USB3 hardware LPM will be enabled for the device and the USB

		device directory will contain a file named

		power/usb3_hardware_lpm. The file holds a string value (enable

		or disable) indicating whether or not USB3 hardware LPM is

		enabled for the device.

		device directory will contain two files named

		power/usb3_hardware_lpm_u1 and power/usb3_hardware_lpm_u2. These

		files hold a string value (enable or disable) indicating whether

		or not USB3 hardware LPM U1 or U2 is enabled for the device.



What:		/sys/bus/usb/devices/.../removable

Date:		February 2012

Documentation/usb/power-management.txt

+6 −5
Original line number Diff line number Diff line
@@ -537,17 +537,18 @@ relevant attribute files are usb2_hardware_lpm and usb3_hardware_lpm. 
		can write y/Y/1 or n/N/0 to the file to	enable/disable

		USB2 hardware LPM manually. This is for	test purpose mainly.



	power/usb3_hardware_lpm

	power/usb3_hardware_lpm_u1

	power/usb3_hardware_lpm_u2



		When a USB 3.0 lpm-capable device is plugged in to a

		xHCI host which supports link PM, it will check if U1

		and U2 exit latencies have been set in the BOS

		descriptor; if the check is is passed and the host

		supports USB3 hardware LPM, USB3 hardware LPM will be

		enabled for the device and this file will be created.

		The file holds a string value (enable or disable)

		indicating whether or not USB3 hardware LPM is

		enabled for the device.

		enabled for the device and these files will be created.

		The files hold a string value (enable or disable)

		indicating whether or not USB3 hardware LPM U1 or U2

		is enabled for the device.



	USB Port Power Control

	----------------------

Makefile

+1 −1
Original line number Diff line number Diff line 
VERSION = 4

PATCHLEVEL = 4

SUBLEVEL = 0

SUBLEVEL = 1

EXTRAVERSION =

NAME = Blurry Fish Butt

arch/arm64/kernel/head.S

+5 −0
Original line number Diff line number Diff line
@@ -512,9 +512,14 @@ CPU_LE( movk x0, #0x30d0, lsl #16 ) // Clear EE and E0E on LE systems 
#endif



	/* EL2 debug */

	mrs	x0, id_aa64dfr0_el1		// Check ID_AA64DFR0_EL1 PMUVer

	sbfx	x0, x0, #8, #4

	cmp	x0, #1

	b.lt	4f				// Skip if no PMU present

	mrs	x0, pmcr_el0			// Disable debug access traps

	ubfx	x0, x0, #11, #5			// to EL2 and allow access to

	msr	mdcr_el2, x0			// all PMU counters from EL1

4:



	/* Stage-2 translation */

	msr	vttbr_el2, xzr

arch/arm64/kernel/perf_event.c

+0 −3
Original line number Diff line number Diff line
@@ -574,9 +574,6 @@ static void armv8pmu_reset(void *info) 


	/* Initialize & Reset PMNC: C and P bits. */

	armv8pmu_pmcr_write(ARMV8_PMCR_P | ARMV8_PMCR_C);



	/* Disable access from userspace. */

	asm volatile("msr pmuserenr_el0, %0" :: "r" (0));

}



static int armv8_pmuv3_map_event(struct perf_event *event)