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Commit 32a3f7a2 authored by Taniya Das's avatar Taniya Das
Browse files

ARM: dts: msm: Update the GDSCs for MSMfalcon 



Remove the GDSC not present in msmfalcon and also remove few clocks which
are not required to be controlled from GDSC driver.

Change-Id: I284197693722912919c59ec26cfae5e382da787b
Signed-off-by: default avatarTaniya Das <tdas@codeaurora.org>
parent 9b82a4c5

arch/arm/boot/dts/qcom/msmfalcon.dtsi

+0 −24
Original line number Diff line number Diff line
@@ -554,10 +554,6 @@ 
};



&gdsc_ufs {

	clock-names = "bus_clk", "ice_clk", "unipro_clk";

	clocks = <&clock_gcc GCC_UFS_AXI_CLK>,

		 <&clock_gcc GCC_UFS_ICE_CORE_CLK>,

		 <&clock_gcc GCC_UFS_UNIPRO_CORE_CLK>;

	status = "ok";

};
@@ -573,50 +569,30 @@ 
	status = "ok";

};



&gdsc_hlos1_vote_lpass_core {

	status = "ok";

};



&gdsc_venus {

	clock-names = "bus_clk", "core_clk";

	clocks = <&clock_mmss MMSS_VIDEO_AXI_CLK>,

		 <&clock_mmss MMSS_VIDEO_CORE_CLK>;

	status = "ok";

};



&gdsc_venus_core0 {

	clock-names = "core0_clk";

	clocks = <&clock_mmss MMSS_VIDEO_SUBCORE0_CLK>;

	qcom,support-hw-trigger;

	status = "ok";

};



&gdsc_camss_top {

	clock-names = "bus_clk", "vfe_axi";

	clocks = <&clock_mmss MMSS_CAMSS_CPP_AXI_CLK>,

		 <&clock_mmss MMSS_CAMSS_VFE_VBIF_AXI_CLK>;

	status = "ok";

};



&gdsc_vfe0 {

	clock-names = "core0_clk" , "core0_stream_clk";

	clocks = <&clock_mmss MMSS_CAMSS_VFE0_CLK>,

		 <&clock_mmss MMSS_CAMSS_VFE0_STREAM_CLK>;

	parent-supply = <&gdsc_camss_top>;

	status = "ok";

};



&gdsc_vfe1 {

	clock-names = "core1_clk" , "core1_stream_clk";

	clocks = <&clock_mmss MMSS_CAMSS_VFE1_CLK>,

		 <&clock_mmss MMSS_CAMSS_VFE1_STREAM_CLK>;

	parent-supply = <&gdsc_camss_top>;

	status = "ok";

};



&gdsc_cpp {

	clock-names = "core_clk";

	clocks = <&clock_mmss MMSS_CAMSS_CPP_CLK>;

	parent-supply = <&gdsc_camss_top>;

	status = "ok";

};