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Commit 32457942 authored by Ben Dooks's avatar Ben Dooks
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ARM: Merge for-2635/fb-updates1

Merge branch 'for-2635/fb-updates1' into for-linus/samsung2
parents 60713996 f64bea43
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+6 −1
Original line number Diff line number Diff line
@@ -647,7 +647,7 @@ config ARCH_SA1100
	  Support for StrongARM 11x0 based boards.

config ARCH_S3C2410
	bool "Samsung S3C2410, S3C2412, S3C2413, S3C2440, S3C2442, S3C2443"
	bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
	select GENERIC_GPIO
	select ARCH_HAS_CPUFREQ
	select HAVE_CLK
@@ -656,6 +656,10 @@ config ARCH_S3C2410
	  BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
	  the Samsung SMDK2410 development board (and derivatives).

	  Note, the S3C2416 and the S3C2450 are so close that they even share
	  the same SoC ID code. This means that there is no seperate machine
	  directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.

config ARCH_S3C64XX
	bool "Samsung S3C64XX"
	select PLAT_SAMSUNG
@@ -892,6 +896,7 @@ if ARCH_S3C2410
source "arch/arm/mach-s3c2400/Kconfig"
source "arch/arm/mach-s3c2410/Kconfig"
source "arch/arm/mach-s3c2412/Kconfig"
source "arch/arm/mach-s3c2416/Kconfig"
source "arch/arm/mach-s3c2440/Kconfig"
source "arch/arm/mach-s3c2443/Kconfig"
endif
+1 −1
Original line number Diff line number Diff line
@@ -162,7 +162,7 @@ machine-$(CONFIG_ARCH_PNX4008) := pnx4008
machine-$(CONFIG_ARCH_PXA)		:= pxa
machine-$(CONFIG_ARCH_REALVIEW)		:= realview
machine-$(CONFIG_ARCH_RPC)		:= rpc
machine-$(CONFIG_ARCH_S3C2410)		:= s3c2410 s3c2400 s3c2412 s3c2440 s3c2443
machine-$(CONFIG_ARCH_S3C2410)		:= s3c2410 s3c2400 s3c2412 s3c2416 s3c2440 s3c2443
machine-$(CONFIG_ARCH_S3C24A0)		:= s3c24a0
machine-$(CONFIG_ARCH_S3C64XX)		:= s3c64xx
machine-$(CONFIG_ARCH_S5P6440)		:= s5p6440
+1 −1
Original line number Diff line number Diff line
@@ -54,7 +54,7 @@ enum dma_ch {
#define DMACH_LOW_LEVEL	(1<<28)	/* use this to specifiy hardware ch no */

/* we have 4 dma channels */
#ifndef CONFIG_CPU_S3C2443
#if !defined(CONFIG_CPU_S3C2443) && !defined(CONFIG_CPU_S3C2416)
#define S3C_DMA_CHANNELS		(4)
#else
#define S3C_DMA_CHANNELS		(6)
+27 −1
Original line number Diff line number Diff line
@@ -115,6 +115,26 @@
#define IRQ_S3C2412_SDI		S3C2410_IRQSUB(13)
#define IRQ_S3C2412_CF		S3C2410_IRQSUB(14)


#define IRQ_S3C2416_EINT8t15	S3C2410_IRQ(5)
#define IRQ_S3C2416_DMA		S3C2410_IRQ(17)
#define IRQ_S3C2416_UART3	S3C2410_IRQ(18)
#define IRQ_S3C2416_SDI1	S3C2410_IRQ(20)
#define IRQ_S3C2416_SDI0	S3C2410_IRQ(21)

#define IRQ_S3C2416_LCD2	S3C2410_IRQSUB(15)
#define IRQ_S3C2416_LCD3	S3C2410_IRQSUB(16)
#define IRQ_S3C2416_LCD4	S3C2410_IRQSUB(17)
#define IRQ_S3C2416_DMA0	S3C2410_IRQSUB(18)
#define IRQ_S3C2416_DMA1	S3C2410_IRQSUB(19)
#define IRQ_S3C2416_DMA2	S3C2410_IRQSUB(20)
#define IRQ_S3C2416_DMA3	S3C2410_IRQSUB(21)
#define IRQ_S3C2416_DMA4	S3C2410_IRQSUB(22)
#define IRQ_S3C2416_DMA5	S3C2410_IRQSUB(23)
#define IRQ_S32416_WDT		S3C2410_IRQSUB(27)
#define IRQ_S32416_AC97		S3C2410_IRQSUB(28)


/* extra irqs for s3c2440 */

#define IRQ_S3C2440_CAM_C	S3C2410_IRQSUB(11)	/* S3C2443 too */
@@ -130,7 +150,10 @@
#define IRQ_S3C2443_HSMMC	S3C2410_IRQ(20)		/* IRQ_SDI */
#define IRQ_S3C2443_NAND	S3C2410_IRQ(24)		/* reserved */

#define IRQ_S3C2416_HSMMC0	S3C2410_IRQ(21)		/* S3C2416/S3C2450 */

#define IRQ_HSMMC0		IRQ_S3C2443_HSMMC
#define IRQ_HSMMC1		IRQ_S3C2416_HSMMC0

#define IRQ_S3C2443_LCD1	S3C2410_IRQSUB(14)
#define IRQ_S3C2443_LCD2	S3C2410_IRQSUB(15)
@@ -152,7 +175,7 @@
#define IRQ_S3C2443_WDT		S3C2410_IRQSUB(27)
#define IRQ_S3C2443_AC97	S3C2410_IRQSUB(28)

#ifdef CONFIG_CPU_S3C2443
#if defined(CONFIG_CPU_S3C2443) || defined(CONFIG_CPU_S3C2416)
#define NR_IRQS (IRQ_S3C2443_AC97+1)
#else
#define NR_IRQS (IRQ_S3C2440_AC97+1)
@@ -164,6 +187,9 @@
#define IRQ_S3CUART_TX3		IRQ_S3C2443_TX3
#define IRQ_S3CUART_ERR3	IRQ_S3C2443_ERR3

#define IRQ_LCD_VSYNC		IRQ_S3C2443_LCD3
#define IRQ_LCD_SYSTEM		IRQ_S3C2443_LCD2

#ifdef CONFIG_CPU_S3C2440
#define IRQ_S3C244x_AC97 IRQ_S3C2440_AC97
#else
+6 −2
Original line number Diff line number Diff line
@@ -63,9 +63,11 @@
#define S3C2440_PA_AC97	   (0x5B000000)
#define S3C2440_SZ_AC97	   SZ_1M

/* S3C2443 High-speed SD/MMC */
/* S3C2443/S3C2416 High-speed SD/MMC */
#define S3C2443_PA_HSMMC   (0x4A800000)
#define S3C2443_SZ_HSMMC   (256)
#define S3C2416_PA_HSMMC0  (0x4AC00000)

#define	S3C2443_PA_FB	(0x4C800000)

/* S3C2412 memory and IO controls */
#define S3C2412_PA_SSMC	(0x4F000000)
@@ -106,10 +108,12 @@
#define S3C24XX_PA_SDI      S3C2410_PA_SDI
#define S3C24XX_PA_NAND	    S3C2410_PA_NAND

#define S3C_PA_FB	    S3C2443_PA_FB
#define S3C_PA_IIC          S3C2410_PA_IIC
#define S3C_PA_UART	    S3C24XX_PA_UART
#define S3C_PA_USBHOST	S3C2410_PA_USBHOST
#define S3C_PA_HSMMC0	    S3C2443_PA_HSMMC
#define S3C_PA_HSMMC1	    S3C2416_PA_HSMMC0
#define S3C_PA_NAND	    S3C24XX_PA_NAND

#endif /* __ASM_ARCH_MAP_H */
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