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Commit 312981bf authored by AnilKumar Chimata's avatar AnilKumar Chimata Committed by Brahmaji K
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ARM: dts: msm: Add sdhc ice device node for sdm660



Add sdhc ice device tree data to dts files with all
the necessary parameters, to enable the ICE driver
for crypto operations related to disk encryption.

Change-Id: I5bfcf35f4a93ef9ef21508d3c4b3309bb0086511
Signed-off-by: default avatarAnilKumar Chimata <anilc@codeaurora.org>
parent 479ce257
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+23 −0
Original line number Diff line number Diff line
@@ -1274,6 +1274,28 @@
		qcom,instance-type = "ufs";
	};

	sdcc1_ice: sdcc1ice@c0c8000 {
		compatible = "qcom,ice";
		reg = <0xc0c8000 0x8000>;
		qcom,enable-ice-clk;
		clock-names = "ice_core_clk_src", "ice_core_clk",
				"bus_clk", "iface_clk";
		clocks = <&clock_gcc SDCC1_ICE_CORE_CLK_SRC>,
			 <&clock_gcc GCC_SDCC1_ICE_CORE_CLK>,
			 <&clock_gcc GCC_SDCC1_APPS_CLK>,
			 <&clock_gcc GCC_SDCC1_AHB_CLK>;
		qcom,op-freq-hz = <300000000>, <0>, <0>, <0>;
		qcom,msm-bus,name = "sdcc_ice_noc";
		qcom,msm-bus,num-cases = <2>;
		qcom,msm-bus,num-paths = <1>;
		qcom,msm-bus,vectors-KBps =
			<78 512 0 0>,    /* No vote */
			<78 512 1000 0>; /* Max. bandwidth */
		qcom,bus-vector-names = "MIN",
					"MAX";
		qcom,instance-type = "sdcc";
	};

	sdhc_1: sdhci@c0c4000 {
		compatible = "qcom,sdhci-msm-v5";
		reg = <0xc0c4000 0x1000>, <0xc0c5000 0x1000>;
@@ -1284,6 +1306,7 @@

		qcom,bus-width = <8>;
		qcom,large-address-bus;
		sdhc-msm-crypto = <&sdcc1_ice>;

		qcom,devfreq,freq-table = <50000000 200000000>;