Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 30307634 authored by Takashi Iwai's avatar Takashi Iwai
Browse files

Merge tag 'asoc-3.4' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into topic/asoc 

A few more ASoC updates, the main one is the move of the audmux driver
from arch/arm into sound/soc.  There's also some general driver specific
tweaks and fixes.
parents 650d6e25 9d5ef266

Documentation/devicetree/bindings/sound/imx-audmux.txt

0 → 100644
+13 −0
Original line number Diff line number Diff line 
Freescale Digital Audio Mux (AUDMUX) device



Required properties:

- compatible : "fsl,imx21-audmux" for AUDMUX version firstly used on i.MX21,

  or "fsl,imx31-audmux" for the version firstly used on i.MX31.

- reg : Should contain AUDMUX registers location and length



Example:



audmux@021d8000 {

	compatible = "fsl,imx6q-audmux", "fsl,imx31-audmux";

	reg = <0x021d8000 0x4000>;

};

arch/arm/mach-imx/Kconfig

+0 −6
Original line number Diff line number Diff line
@@ -46,7 +46,6 @@ config SOC_IMX21 
	bool

	select MACH_MX21

	select CPU_ARM926T

	select ARCH_MXC_AUDMUX_V1

	select IMX_HAVE_DMA_V1

	select IMX_HAVE_IOMUX_V1

	select MXC_AVIC
@@ -55,7 +54,6 @@ config SOC_IMX25 
	bool

	select ARCH_MX25

	select CPU_ARM926T

	select ARCH_MXC_AUDMUX_V2

	select ARCH_MXC_IOMUX_V3

	select MXC_AVIC
@@ -63,7 +61,6 @@ config SOC_IMX27 
	bool

	select MACH_MX27

	select CPU_ARM926T

	select ARCH_MXC_AUDMUX_V1

	select IMX_HAVE_DMA_V1

	select IMX_HAVE_IOMUX_V1

	select MXC_AVIC
@@ -72,7 +69,6 @@ config SOC_IMX31 
	bool

	select CPU_V6

	select IMX_HAVE_PLATFORM_MXC_RNGA

	select ARCH_MXC_AUDMUX_V2

	select MXC_AVIC

	select SMP_ON_UP if SMP
@@ -80,7 +76,6 @@ config SOC_IMX35 
	bool

	select CPU_V6

	select ARCH_MXC_IOMUX_V3

	select ARCH_MXC_AUDMUX_V2

	select HAVE_EPIT

	select MXC_AVIC

	select SMP_ON_UP if SMP
@@ -89,7 +84,6 @@ config SOC_IMX5 
	select CPU_V7

	select MXC_TZIC

	select ARCH_MXC_IOMUX_V3

	select ARCH_MXC_AUDMUX_V2

	select ARCH_HAS_CPUFREQ

	select ARCH_MX5

	bool

arch/arm/mach-imx/eukrea_mbimx27-baseboard.c

+0 −20
Original line number Diff line number Diff line
@@ -32,7 +32,6 @@ 
#include <mach/common.h>

#include <mach/iomux-mx27.h>

#include <mach/hardware.h>

#include <mach/audmux.h>



#include "devices-imx27.h"
@@ -306,25 +305,6 @@ void __init eukrea_mbimx27_baseboard_init(void) 
	mxc_gpio_setup_multiple_pins(eukrea_mbimx27_pins,

		ARRAY_SIZE(eukrea_mbimx27_pins), "MBIMX27");



#if defined(CONFIG_SND_SOC_EUKREA_TLV320) \

	|| defined(CONFIG_SND_SOC_EUKREA_TLV320_MODULE)

	/* SSI unit master I2S codec connected to SSI_PINS_4*/

	mxc_audmux_v1_configure_port(MX27_AUDMUX_HPCR1_SSI0,

			MXC_AUDMUX_V1_PCR_SYN |

			MXC_AUDMUX_V1_PCR_TFSDIR |

			MXC_AUDMUX_V1_PCR_TCLKDIR |

			MXC_AUDMUX_V1_PCR_RFSDIR |

			MXC_AUDMUX_V1_PCR_RCLKDIR |

			MXC_AUDMUX_V1_PCR_TFCSEL(MX27_AUDMUX_HPCR3_SSI_PINS_4) |

			MXC_AUDMUX_V1_PCR_RFCSEL(MX27_AUDMUX_HPCR3_SSI_PINS_4) |

			MXC_AUDMUX_V1_PCR_RXDSEL(MX27_AUDMUX_HPCR3_SSI_PINS_4)

	);

	mxc_audmux_v1_configure_port(MX27_AUDMUX_HPCR3_SSI_PINS_4,

			MXC_AUDMUX_V1_PCR_SYN |

			MXC_AUDMUX_V1_PCR_RXDSEL(MX27_AUDMUX_HPCR1_SSI0)

	);

#endif



	imx27_add_imx_uart1(&uart_pdata);

	imx27_add_imx_uart2(&uart_pdata);

#if !defined(MACH_EUKREA_CPUIMX27_USEUART4)

arch/arm/mach-imx/eukrea_mbimxsd-baseboard.c

+0 −1
Original line number Diff line number Diff line
@@ -37,7 +37,6 @@ 
#include <mach/hardware.h>

#include <mach/common.h>

#include <mach/iomux-mx51.h>

#include <mach/audmux.h>



#include "devices-imx51.h"

arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c

+0 −17
Original line number Diff line number Diff line
@@ -31,7 +31,6 @@ 
#include <asm/mach-types.h>

#include <asm/mach/arch.h>

#include <mach/mx25.h>

#include <mach/audmux.h>



#include "devices-imx25.h"
@@ -241,22 +240,6 @@ void __init eukrea_mbimxsd25_baseboard_init(void) 
			ARRAY_SIZE(eukrea_mbimxsd_pads)))

		printk(KERN_ERR "error setting mbimxsd pads !\n");



#if defined(CONFIG_SND_SOC_EUKREA_TLV320)

	/* SSI unit master I2S codec connected to SSI_AUD5*/

	mxc_audmux_v2_configure_port(0,

			MXC_AUDMUX_V2_PTCR_SYN |

			MXC_AUDMUX_V2_PTCR_TFSDIR |

			MXC_AUDMUX_V2_PTCR_TFSEL(4) |

			MXC_AUDMUX_V2_PTCR_TCLKDIR |

			MXC_AUDMUX_V2_PTCR_TCSEL(4),

			MXC_AUDMUX_V2_PDCR_RXDSEL(4)

	);

	mxc_audmux_v2_configure_port(4,

			MXC_AUDMUX_V2_PTCR_SYN,

			MXC_AUDMUX_V2_PDCR_RXDSEL(0)

	);

#endif



	imx25_add_imx_uart1(&uart_pdata);

	imx25_add_imx_fb(&eukrea_mximxsd_fb_pdata);

	imx25_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata);