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Commit 2e8cfc1f authored by Alex Deucher's avatar Alex Deucher Committed by Greg Kroah-Hartman
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drm/amdgpu/dp: add back special handling for NUTMEG 



commit 02d27234759dc4fe14a880ec1e1dee108cb0b503 upstream.

When I fixed the dp rate selection in:
3b73b168cffd9c392584d3f665021fa2190f8612
drm/amdgpu: fix dp link rate selection (v2)
I accidently dropped the special handling for NUTMEG
DP bridge chips.  They require a fixed link rate.

Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Reviewed-by: default avatarKen Wang <Qingqing.Wang@amd.com>
Reviewed-by: default avatarHarry Wentland <harry.wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 72c13445

drivers/gpu/drm/amd/amdgpu/atombios_dp.c

+16 −4
Original line number Diff line number Diff line
@@ -265,6 +265,17 @@ static int amdgpu_atombios_dp_get_dp_link_config(struct drm_connector *connector 
	unsigned max_lane_num = drm_dp_max_lane_count(dpcd);

	unsigned lane_num, i, max_pix_clock;



	if (amdgpu_connector_encoder_get_dp_bridge_encoder_id(connector) ==

	    ENCODER_OBJECT_ID_NUTMEG) {

		for (lane_num = 1; lane_num <= max_lane_num; lane_num <<= 1) {

			max_pix_clock = (lane_num * 270000 * 8) / bpp;

			if (max_pix_clock >= pix_clock) {

				*dp_lanes = lane_num;

				*dp_rate = 270000;

				return 0;

			}

		}

	} else {

		for (lane_num = 1; lane_num <= max_lane_num; lane_num <<= 1) {

			for (i = 0; i < ARRAY_SIZE(link_rates) && link_rates[i] <= max_link_rate; i++) {

				max_pix_clock = (lane_num * link_rates[i] * 8) / bpp;
@@ -275,6 +286,7 @@ static int amdgpu_atombios_dp_get_dp_link_config(struct drm_connector *connector 
				}

			}

		}

	}



	return -EINVAL;

}