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Commit 2e83f533 authored by Deepak Katragadda's avatar Deepak Katragadda Committed by Jeevan Shriram
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clk: msm: clock-alpha-pll: Fix incorrect fabia PLL settings 



For the fabia PLL to be in STANDBY mode, the RESET_N bit should
be set so that the PLL comes out of reset. Else, the PLL is
at OFF state and changing it's frequencies would not cause the
ACK_LATCH to be set.

CRs-Fixed: 1018752
Change-Id: I30f1ee0f4fdb8d92a9f6e187c1d8b797a0bdc94d
Signed-off-by: default avatarDeepak Katragadda <dkatraga@codeaurora.org>
parent 7e3d9481

drivers/clk/msm/clock-alpha-pll.c

+4 −5
Original line number Diff line number Diff line
@@ -925,11 +925,6 @@ static void __fabia_alpha_pll_disable(struct alpha_pll_clk *pll) 
	mode &= ~FABIA_PLL_OUT_MAIN;

	writel_relaxed(mode, FABIA_USER_CTL_LO_REG(pll));



	/* Place PLL is the OFF state */

	mode  = readl_relaxed(MODE_REG(pll));

	mode &= ~PLL_RESET_N;

	writel_relaxed(mode, MODE_REG(pll));



	/* Place the PLL mode in STANDBY */

	writel_relaxed(FABIA_PLL_STANDBY, FABIA_PLL_OPMODE(pll));

}
@@ -1038,6 +1033,10 @@ static enum handoff fabia_alpha_pll_handoff(struct clk *c) 
	regval |= ALPHA_PLL_HW_UPDATE_LOGIC_BYPASS;

	writel_relaxed(regval, MODE_REG(pll));



	/* Set the PLL_RESET_N bit to place the PLL in STANDBY from OFF */

	regval |= PLL_RESET_N;

	writel_relaxed(regval, MODE_REG(pll));



	if (!is_locked(pll)) {

		if (c->rate && fabia_alpha_pll_set_rate(c, c->rate))

			WARN(1, "%s: Failed to configure rate\n", c->dbg_name);