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Commit 2bddc21c authored by Linux Build Service Account's avatar Linux Build Service Account
Browse files

Promotion of kernel.lnx.4.4-161014. 

CRs      Change ID                                   Subject
--------------------------------------------------------------------------------------------------------------
1074879   Ib0cadbd390d1a0b6da3e39c98010cedb43e5bf60   sched: bucketize CPU c-state levels
1074879   If927f84f6c8ba719716d99669e5d1f1b19aaacbe   sched: use wakeup latency as c-state determinant
1074660   Ie326495e012b693b47b33a4818ec11485afd88e9   ARM: dts: msm: Enable System sleep stats for MSM8998
1076523   I1eb5c61037004e200e8f261d6e39b73028f04ab4   clk: msm: clock-osm: enable WDOG status registers for ms
1074875   I94ef9c913e1d5be2801d553fdc859b80b62e8aa5   defconfig: msm: Turn on scheduler tuning configs
1066658   I7a5a89c32dc4b1284895d01202dcfdd8a90ccda0   msm: vidc: Don't print message queues in error cases
1072607   I9e4b0d7cc5f164b207a1a0e2c1ae24bdfd8fa063   clk: qcom: Add support for the turing vote clocks
1077079   I8f36906f508998c6369f30e0eadc1703c70533b9   net: core: Remove warning for cloned packets in ingress
1076109   Ied6e925070db6fbfec80677b9f368325777db7b4   msm: ADSPRPC: Support for dma-coherent devices
1076198   If2845efa942abc5849890b45de525222632b32db   power_supply: add PARALLEL_DISABLE property
1076198   Ia9cd9d352935be19e9383141cf279a34796ff642   qpnp-smb2: add the PARALLEL_DISABLE property to usb psy
1076547   I8ef4a258e55e3dbbc3cd67472a5f2d3931d26c12   msm: wlan: Change Egypt regulatory rules
1076210   Icd717147adc018a076a72bd5ce1a52a765f34f7b   smb-lib: smb138x-charger: add parallel current to parall
1074803 1076690   I2df3304029a05ce0f4cb11551e9ed768cd89f8b5   diag: Update msg, log and event information
1070186   I74bed6cfd9753765b15d17d69ba30f61875e87c8   ASoC: wcd-spi: Initialize local variables before usage
1076696   I681509b653c419159f6ca4172c5ff66a1cae1b79   diag: Add MSG SSID for DPM
1075605   Id38737dad70853ccd83685841d0c2498ee722ff2   msm: ipa: Add guard around nat entries read
1076109   I8ea271103c202cefdedae62f2717f1bee44c1d78   ARM: dts: msm: Enable cache coherency for fastrpc device
1072607   I0bad9d7bbee060ef70f3e8e6274fccc86fe9df6e   ARM: dts: msm: Add support for GDSCs for MSMFalcon/MSMtr
1053516   I808e247669fab61a6a64131858fe2f9e19754242   msm: kgsl: restructure GPU power initialization
1074911   I38689d490a31a8e02688d0cacaa6f6028f6f79c8   msm: vidc: Fix the condition to check dcvs support
1077254   Iea45a4e8ab4560a093c44800ddd7b1311471c646   ASoC: wcd9xxx: Disable external clock buffer when mclk i
1073003   I0aba2165cd7e1a0d6f4227ccdcfb7ba9317bdc62   rpm-smd: Fix memory leak when rpm create request fails
1074875   I64585ff8cceb307904e20ff788e52eb05c000e1f   sched/tune: Remove redundant checks for NULL css
1076632   Ia2803d6ca021d505ed2e711e676cbd701b11c492   ASoC: wcd-dsp-mgr: rename wdsp_intr_handler to wdsp_sign
1068034   Ib472c226b7e35079e6b8391848a0a0d1c38962c0   clk: msm: clock: Update the bimc clock mux index
1049521 1049615   I3e59e27534b8e1088d74b42c72e0075d2fe910e6   misc: qcom: qdsp6v2: Add missing initialization
1074300   I6090d4163e760dc02a7dce45f1246bb59b2e195b   smb138x-charger: enable parallel current sensing
1076632   I79502c043f5e16947c895aab7cd584d72ad1a7dc   ASoC: wcd-dsp-mgr: handle codec down and up events
1076632   Ideed297fde016b0623616be64875be094e688981   ASoC: wcd-spi: Move one time initializations to componen
1076646   I86a54a77c26cab5627256ea876929bc1af3e0d56   smb138x-charger: update FCC configuration parameters
994035   Ic2dac9bdc1cd9f9b8d236997eba2e63295d6b4c0   clk: msm: clock-osm: Set Nominal Fmax frequency for boot
1075219   I1005b135f5e16111257902413ef2b44c09cb1cfc   qpnp-smb2: smb-lib: update reading charge_done property
1072782   I92df514e31d5168b8dff4b249f4d8fd3e70c0118   dwc3: gadget: Don't memset TRB ring with zero related to
1072656   I5e7bc2ed8dce0b1dde4931e653db4233e90ed1cd   input: misc: add Kconfig and Makefile for pat9125

Change-Id: Ic27bce367e73a035de6b0d91acbd428b55c0c84e
CRs-Fixed: 994035, 1073003, 1077079, 1076646, 1076198, 1074911, 1074875, 1076632, 1074879, 1074660, 1075219, 1076109, 1049615, 1072607, 1076547, 1074803, 1072782, 1077254, 1076210, 1066658, 1070186, 1076523, 1049521, 1053516, 1074300, 1072656, 1075605, 1068034, 1076690, 1076696
parents 21d19f62 fac2c0da

arch/arm/boot/dts/qcom/msm-gdsc-falcon.dtsi

0 → 100644
+159 −0
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2016, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

 * only version 2 as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



&soc {

	/* GCC GDSCs */

	gdsc_usb30: qcom,gdsc@10f004 {

		compatible = "qcom,gdsc";

		regulator-name = "gdsc_usb30";

		reg = <0x10f004 0x4>;

		status = "disabled";

	};



	gdsc_ufs: qcom,gdsc@175004 {

		compatible = "qcom,gdsc";

		regulator-name = "gdsc_ufs";

		reg = <0x175004 0x4>;

		status = "disabled";

	};



	gdsc_hlos1_vote_lpass_adsp: qcom,gdsc@17d034 {

		compatible = "qcom,gdsc";

		regulator-name = "gdsc_hlos1_vote_lpass_adsp";

		reg = <0x17d034 0x4>;

		qcom,no-status-check-on-disable;

		qcom,gds-timeout = <500>;

		status = "disabled";

	};



	gdsc_hlos1_vote_turing_adsp: qcom,gdsc@17d04c {

		compatible = "qcom,gdsc";

		regulator-name = "gdsc_hlos1_vote_turing_adsp";

		reg = <0x17d04c 0x4>;

		qcom,no-status-check-on-disable;

		qcom,gds-timeout = <500>;

		status = "disabled";

	};



	gdsc_hlos2_vote_turing_adsp: qcom,gdsc@17e04c {

		compatible = "qcom,gdsc";

		regulator-name = "gdsc_hlos2_vote_turing_adsp";

		reg = <0x17e04c 0x4>;

		qcom,no-status-check-on-disable;

		qcom,gds-timeout = <500>;

		status = "disabled";

	};



	/* MMSS GDSCs */

	bimc_smmu_hw_ctrl: syscon@c8ce024 {

	      compatible = "syscon";

	      reg = <0xc8ce024 0x4>;

	};



	gdsc_bimc_smmu: qcom,gdsc@c8ce020 {

		compatible = "qcom,gdsc";

		regulator-name = "gdsc_bimc_smmu";

		reg = <0xc8ce020 0x4>;

		hw-ctrl-addr = <&bimc_smmu_hw_ctrl>;

		qcom,no-status-check-on-disable;

		qcom,gds-timeout = <500>;

		status = "disabled";

	};



	gdsc_venus: qcom,gdsc@c8c1024 {

		compatible = "qcom,gdsc";

		regulator-name = "gdsc_venus";

		reg = <0xc8c1024 0x4>;

		status = "disabled";

	};



	gdsc_venus_core0: qcom,gdsc@c8c1040 {

		compatible = "qcom,gdsc";

		regulator-name = "gdsc_venus_core0";

		reg = <0xc8c1040 0x4>;

		status = "disabled";

	};



	gdsc_camss_top: qcom,gdsc@c8c34a0 {

		compatible = "qcom,gdsc";

		regulator-name = "gdsc_camss_top";

		reg = <0xc8c34a0 0x4>;

		status = "disabled";

	};



	gdsc_vfe0: qcom,gdsc@c8c3664 {

		compatible = "qcom,gdsc";

		regulator-name = "gdsc_vfe0";

		reg = <0xc8c3664 0x4>;

		status = "disabled";

	};



	gdsc_vfe1: qcom,gdsc@c8c3674 {

		compatible = "qcom,gdsc";

		regulator-name = "gdsc_vfe1";

		reg = <0xc8c3674 0x4>;

		status = "disabled";

	};



	gdsc_cpp: qcom,gdsc@c8c36d4 {

		compatible = "qcom,gdsc";

		regulator-name = "gdsc_cpp";

		reg = <0xc8c36d4 0x4>;

		status = "disabled";

	};



	gdsc_mdss: qcom,gdsc@c8c2304 {

		compatible = "qcom,gdsc";

		regulator-name = "gdsc_mdss";

		reg = <0xc8c2304 0x4>;

		status = "disabled";

	};



	/* GPU GDSCs */

	gpu_cx_hw_ctrl: syscon@5066008 {

		compatible = "syscon";

		reg = <0x5066008 0x4>;

	};



	gdsc_gpu_cx: qcom,gdsc@5066004 {

		compatible = "qcom,gdsc";

		regulator-name = "gdsc_gpu_cx";

		reg = <0x5066004 0x4>;

		hw-ctrl-addr = <&gpu_cx_hw_ctrl>;

		qcom,no-status-check-on-disable;

		qcom,gds-timeout = <2000>;

		status = "disabled";

	};



	/* GPU GX GDSCs */

	gpu_gx_domain_addr: syscon@5065130 {

		compatible = "syscon";

		reg = <0x5065130 0x4>;

	};



	gpu_gx_sw_reset: syscon@5066090 {

		compatible = "syscon";

		reg = <0x5066090 0x4>;

	};



	gdsc_gpu_gx: qcom,gdsc@5066094 {

		compatible = "qcom,gdsc";

		regulator-name = "gdsc_gpu_gx";

		reg = <0x5066094 0x4>;

		domain-addr = <&gpu_gx_domain_addr>;

		sw-reset = <&gpu_gx_sw_reset>;

		qcom,retain-periph;

		qcom,reset-aon-logic;

		status = "disabled";

	};

};

arch/arm/boot/dts/qcom/msmcobalt-pm.dtsi

+46 −0
Original line number Diff line number Diff line
@@ -279,6 +279,52 @@ 
		qcom,sleep-stats-version = <2>;

	};



	qcom,rpm-rail-stats@200000 {

		compatible = "qcom,rpm-rail-stats";

		reg = <0x200000 0x100>,

			<0x29000c 0x4>;

		reg-names = "phys_addr_base",

			    "offset_addr";

	};



	qcom,rpm-log@200000 {

		compatible = "qcom,rpm-log";

		reg = <0x200000 0x4000>,

			<0x290018 0x4>;

		qcom,rpm-addr-phys = <0x200000>;

		qcom,offset-version = <4>;

		qcom,offset-page-buffer-addr = <36>;

		qcom,offset-log-len = <40>;

		qcom,offset-log-len-mask = <44>;

		qcom,offset-page-indices = <56>;

	};



	qcom,rpm-master-stats@778150 {

		compatible = "qcom,rpm-master-stats";

		reg = <0x778150 0x5000>;

		qcom,masters = "APSS", "MPSS", "ADSP", "SLPI";

		qcom,master-stats-version = <2>;

		qcom,master-offset = <4096>;

	};



	rpm_msg_ram: memory@0x200000 {

		compatible = "qcom,rpm-msg-ram";

		reg = <0x200000 0x1000>,

			<0x290000 0x1000>;

	};



	rpm_code_ram: rpm-memory@0x778000 {

		compatible = "qcom,rpm-code-ram";

		reg = <0x778000 0x5000>;

	};



	qcom,system-stats {

		compatible = "qcom,system-stats";

		qcom,rpm-msg-ram = <&rpm_msg_ram>;

		qcom,rpm-code-ram = <&rpm_code_ram>;

		qcom,masters = "APSS", "MPSS", "ADSP", "SLPI";

	};



	qcom,mpm@7781b8 {

		compatible = "qcom,mpm-v2";

		reg = <0x7781b8 0x1000>, /* MSM_RPM_MPM_BASE 4K */

arch/arm/boot/dts/qcom/msmcobalt.dtsi

+8 −0
Original line number Diff line number Diff line
@@ -1192,41 +1192,49 @@ 
			label = "adsprpc-smd";

			iommus = <&lpass_q6_smmu 2>;

			qcom,secure-context-bank;

			dma-coherent;

		};

		qcom,msm_fastrpc_compute_cb1 {

			compatible = "qcom,msm-fastrpc-compute-cb";

			label = "adsprpc-smd";

			iommus = <&lpass_q6_smmu 8>;

			dma-coherent;

		};

		qcom,msm_fastrpc_compute_cb2 {

			compatible = "qcom,msm-fastrpc-compute-cb";

			label = "adsprpc-smd";

			iommus = <&lpass_q6_smmu 9>;

			dma-coherent;

		};

		qcom,msm_fastrpc_compute_cb3 {

			compatible = "qcom,msm-fastrpc-compute-cb";

			label = "adsprpc-smd";

			iommus = <&lpass_q6_smmu 10>;

			dma-coherent;

		};

		qcom,msm_fastrpc_compute_cb4 {

			compatible = "qcom,msm-fastrpc-compute-cb";

			label = "adsprpc-smd";

			iommus = <&lpass_q6_smmu 11>;

			dma-coherent;

		};

		qcom,msm_fastrpc_compute_cb6 {

			compatible = "qcom,msm-fastrpc-compute-cb";

			label = "adsprpc-smd";

			iommus = <&lpass_q6_smmu 5>;

			dma-coherent;

		};

		qcom,msm_fastrpc_compute_cb7 {

			compatible = "qcom,msm-fastrpc-compute-cb";

			label = "adsprpc-smd";

			iommus = <&lpass_q6_smmu 6>;

			dma-coherent;

		};

		qcom,msm_fastrpc_compute_cb8 {

			compatible = "qcom,msm-fastrpc-compute-cb";

			label = "adsprpc-smd";

			iommus = <&lpass_q6_smmu 7>;

			dma-coherent;

		};

	};

arch/arm/boot/dts/qcom/msmfalcon.dtsi

+10 −1
Original line number Diff line number Diff line
@@ -675,7 +675,7 @@ 
#include "msmfalcon-ion.dtsi"

#include "msmfalcon-bus.dtsi"

#include "msmfalcon-regulator.dtsi"

#include "msm-gdsc-cobalt.dtsi"

#include "msm-gdsc-falcon.dtsi"



&gdsc_usb30 {

	clock-names = "core_clk";
@@ -699,6 +699,14 @@ 
	status = "ok";

};



&gdsc_hlos1_vote_turing_adsp {

	status = "ok";

};



&gdsc_hlos2_vote_turing_adsp {

	status = "ok";

};



&gdsc_venus {

	status = "ok";

};
@@ -749,5 +757,6 @@ 
&gdsc_gpu_cx {

	status = "ok";

};



#include "msm-pmfalcon.dtsi"

#include "msm-pm2falcon.dtsi"

arch/arm/boot/dts/qcom/msmtriton.dtsi

+76 −0
Original line number Diff line number Diff line
@@ -16,6 +16,7 @@ 
#include <dt-bindings/clock/qcom,mmcc-msmfalcon.h>

#include <dt-bindings/clock/qcom,rpmcc.h>

#include <dt-bindings/interrupt-controller/arm-gic.h>

#include <dt-bindings/regulator/qcom,rpm-smd-regulator.h>



/ {

	model = "Qualcomm Technologies, Inc. MSMTRITON";
@@ -543,3 +544,78 @@ 
};



#include "msmtriton-ion.dtsi"

#include "msmfalcon-regulator.dtsi"

#include "msm-gdsc-falcon.dtsi"



&gdsc_usb30 {

	clock-names = "core_clk";

	clocks = <&clock_gcc GCC_USB30_MASTER_CLK>;

	status = "ok";

};



&gdsc_ufs {

	status = "ok";

};



&gdsc_bimc_smmu {

	clock-names = "bus_clk";

	clocks = <&clock_mmss MMSS_BIMC_SMMU_AXI_CLK>;

	proxy-supply = <&gdsc_bimc_smmu>;

	qcom,proxy-consumer-enable;

	status = "ok";

};



&gdsc_hlos1_vote_lpass_adsp {

	status = "ok";

};



&gdsc_venus {

	status = "ok";

};



&gdsc_venus_core0 {

	qcom,support-hw-trigger;

	status = "ok";

};



&gdsc_camss_top {

	status = "ok";

};



&gdsc_vfe0 {

	parent-supply = <&gdsc_camss_top>;

	status = "ok";

};



&gdsc_vfe1 {

	parent-supply = <&gdsc_camss_top>;

	status = "ok";

};



&gdsc_cpp {

	parent-supply = <&gdsc_camss_top>;

	status = "ok";

};



&gdsc_mdss {

	clock-names = "bus_clk", "rot_clk";

	clocks = <&clock_mmss MMSS_MDSS_AXI_CLK>,

		 <&clock_mmss MMSS_MDSS_ROT_CLK>;

	proxy-supply = <&gdsc_mdss>;

	qcom,proxy-consumer-enable;

	status = "ok";

};



&gdsc_gpu_gx {

	clock-names = "bimc_core_clk", "core_clk", "core_root_clk";

	clocks = <&clock_gcc GCC_GPU_BIMC_GFX_CLK>,

		 <&clock_gfx GPUCC_GFX3D_CLK>,

		 <&clock_gfx GFX3D_CLK_SRC>;

	qcom,force-enable-root-clk;

	parent-supply = <&gfx_vreg_corner>;

	status = "ok";

};



&gdsc_gpu_cx {

	status = "ok";

};