Merge "usb: phy: qusb: Remove updating VBUS status from QUSB PHY driver" (2a298044) · Commits · e / devices / android_kernel_sony_msm8998

Documentation/devicetree/bindings/usb/msm-phy.txt

+3 −10

Original line number	Diff line number	Diff line
		@@ -180,16 +180,11 @@ Required properties:
		- phy_type: Should be one of "ulpi" or "utmi". ChipIdea core uses "ulpi" mode.

		Optional properties:
		- reg: Address and length register set to control QUSB2 PHY
		"qscratch_base" : QSCRATCH base register set.
		- reg-names: Additional registers corresponding with the following:
		"tune2_efuse_addr": EFUSE based register address to read TUNE2 parameter.
		via the QSCRATCH interface.
		"emu_phy_base" : phy base address used for programming emulation target phy.
		"ref_clk_addr" : ref_clk bcr address used for on/off ref_clk before reset.
		- reg-names: Should be "qscratch_base". The qscratch register bank
		allows us to manipulate QUSB PHY bits eg. to enable D+ pull-up using s/w
		control in device mode. The reg-names property is required if the
		reg property is specified.
		- clocks: a list of phandles to the PHY clocks. Use as per
		Documentation/devicetree/bindings/clock/clock-bindings.txt
		- clock-names: Names of the clocks in 1-1 correspondence with the "clocks"
		@@ -210,10 +205,8 @@ Optional properties:
		Example:
		qusb_phy: qusb@f9b39000 {
		compatible = "qcom,qusb2phy";
		reg = <0x00079000 0x7000>,
		<0x08af8800 0x400>;
		reg-names = "qusb_phy_base",
		"qscratch_base";
		reg = <0x00079000 0x7000>;
		reg-names = "qusb_phy_base";
		vdd-supply = <&pm8994_s2_corner>;
		vdda18-supply = <&pm8994_l6>;
		vdda33-supply = <&pm8994_l24>;

arch/arm/boot/dts/qcom/msm8996.dtsi

+0 −4

Original line number	Diff line number	Diff line
		@@ -2059,11 +2059,9 @@
		qusb_phy0: qusb@7411000 {
		compatible = "qcom,qusb2phy";
		reg = <0x07411000 0x180>,
		<0x06af8800 0x400>,
		<0x0007024c 0x4>,
		<0x00388018 0x4>;
		reg-names = "qusb_phy_base",
		"qscratch_base",
		"tune2_efuse_addr",
		"ref_clk_addr";
		vdd-supply = <&pm8994_s2_corner>;
		@@ -2096,11 +2094,9 @@
		qusb_phy1: qusb@7412000 {
		compatible = "qcom,qusb2phy";
		reg = <0x07412000 0x180>,
		<0x076f8800 0x400>,
		<0x0007024c 0x4>,
		<0x00388014 0x4>;
		reg-names = "qusb_phy_base",
		"qscratch_base",
		"tune2_efuse_addr",
		"ref_clk_addr";
		vdd-supply = <&pm8994_s2_corner>;

arch/arm/boot/dts/qcom/msmcobalt.dtsi

+2 −4

Original line number	Diff line number	Diff line
		@@ -1779,10 +1779,8 @@

		qusb_phy0: qusb@c012000 {
		compatible = "qcom,qusb2phy-v2";
		reg = <0x0c012000 0x2a8>,
		<0x0a8f8800 0x400>;
		reg-names = "qusb_phy_base",
		"qscratch_base";
		reg = <0x0c012000 0x2a8>;
		reg-names = "qusb_phy_base";
		vdd-supply = <&pmcobalt_l1>;
		vdda18-supply = <&pmcobalt_l12>;
		vdda33-supply = <&pmcobalt_l24>;

drivers/usb/phy/phy-msm-qusb-v2.c

+6 −62

Original line number	Diff line number	Diff line
		@@ -54,10 +54,6 @@

		#define QUSB2PHY_PORT_TUNE2 0x240

		#define HS_PHY_CTRL_REG 0x10
		#define UTMI_OTG_VBUS_VALID BIT(20)
		#define SW_SESSVLD_SEL BIT(28)

		#define QUSB2PHY_1P8_VOL_MIN 1800000 /* uV */
		#define QUSB2PHY_1P8_VOL_MAX 1800000 /* uV */
		#define QUSB2PHY_1P8_HPM_LOAD 30000 /* uA */
		@@ -76,7 +72,6 @@ MODULE_PARM_DESC(phy_tune2, "QUSB PHY v2 TUNE2");
		struct qusb_phy {
		struct usb_phy phy;
		void __iomem *base;
		void __iomem *qscratch_base;
		void __iomem *tune2_efuse_reg;

		struct clk *ref_clk_src;
		@@ -625,25 +620,6 @@ static int qusb_phy_set_suspend(struct usb_phy *phy, int suspend)
		return 0;
		}

		static void qusb_write_readback(void *base, u32 offset,
		const u32 mask, u32 val)
		{
		u32 write_val, tmp = readl_relaxed(base + offset);

		tmp &= ~mask; /* retain other bits */
		write_val = tmp \| val;

		writel_relaxed(write_val, base + offset);

		/* Read back to see if val was written */
		tmp = readl_relaxed(base + offset);
		tmp &= mask; /* clear other bits */

		if (tmp != val)
		pr_err("%s: write: %x to QSCRATCH: %x FAILED\n",
		__func__, val, offset);
		}

		static int qusb_phy_notify_connect(struct usb_phy *phy,
		enum usb_device_speed speed)
		{
		@@ -651,21 +627,11 @@ static int qusb_phy_notify_connect(struct usb_phy *phy,

		qphy->cable_connected = true;

		dev_dbg(phy->dev, " cable_connected=%d\n", qphy->cable_connected);

		if (qphy->qusb_phy_host_init_seq && qphy->phy.flags & PHY_HOST_MODE)
		qusb_phy_host_init(phy);

		/* Set OTG VBUS Valid from HSPHY to controller */
		qusb_write_readback(qphy->qscratch_base, HS_PHY_CTRL_REG,
		UTMI_OTG_VBUS_VALID,
		UTMI_OTG_VBUS_VALID);

		/* Indicate value is driven by UTMI_OTG_VBUS_VALID bit */
		qusb_write_readback(qphy->qscratch_base, HS_PHY_CTRL_REG,
		SW_SESSVLD_SEL, SW_SESSVLD_SEL);

		dev_dbg(phy->dev, "QUSB2 phy connect notification\n");
		dev_dbg(phy->dev, "QUSB PHY: connect notification cable_connected=%d\n",
		qphy->cable_connected);
		return 0;
		}

		@@ -676,17 +642,8 @@ static int qusb_phy_notify_disconnect(struct usb_phy *phy,

		qphy->cable_connected = false;

		dev_dbg(phy->dev, " cable_connected=%d\n", qphy->cable_connected);

		/* Set OTG VBUS Valid from HSPHY to controller */
		qusb_write_readback(qphy->qscratch_base, HS_PHY_CTRL_REG,
		UTMI_OTG_VBUS_VALID, 0);

		/* Indicate value is driven by UTMI_OTG_VBUS_VALID bit */
		qusb_write_readback(qphy->qscratch_base, HS_PHY_CTRL_REG,
		SW_SESSVLD_SEL, 0);

		dev_dbg(phy->dev, "QUSB2 phy disconnect notification\n");
		dev_dbg(phy->dev, "QUSB PHY: connect notification cable_connected=%d\n",
		qphy->cable_connected);
		return 0;
		}

		@@ -767,16 +724,6 @@ static int qusb_phy_probe(struct platform_device *pdev)
		if (IS_ERR(qphy->base))
		return PTR_ERR(qphy->base);

		res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
		"qscratch_base");
		if (res) {
		qphy->qscratch_base = devm_ioremap_resource(dev, res);
		if (IS_ERR(qphy->qscratch_base)) {
		dev_dbg(dev, "couldn't ioremap qscratch_base\n");
		qphy->qscratch_base = NULL;
		}
		}

		res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
		"emu_phy_base");
		if (res) {
		@@ -977,11 +924,8 @@ static int qusb_phy_probe(struct platform_device *pdev)
		qphy->phy.set_suspend = qusb_phy_set_suspend;
		qphy->phy.shutdown = qusb_phy_shutdown;
		qphy->phy.type = USB_PHY_TYPE_USB2;

		if (qphy->qscratch_base) {
		qphy->phy.notify_connect = qusb_phy_notify_connect;
		qphy->phy.notify_disconnect = qusb_phy_notify_disconnect;
		}

		ret = usb_add_phy_dev(&qphy->phy);
		if (ret)

drivers/usb/phy/phy-msm-qusb.c

+6 −60

Original line number	Diff line number	Diff line
		@@ -88,9 +88,6 @@
		#define LINESTATE_DP BIT(0)
		#define LINESTATE_DM BIT(1)

		#define HS_PHY_CTRL_REG 0x10
		#define UTMI_OTG_VBUS_VALID BIT(20)
		#define SW_SESSVLD_SEL BIT(28)

		#define QUSB2PHY_1P8_VOL_MIN 1800000 /* uV */
		#define QUSB2PHY_1P8_VOL_MAX 1800000 /* uV */
		@@ -109,7 +106,6 @@ MODULE_PARM_DESC(tune2, "QUSB PHY TUNE2");
		struct qusb_phy {
		struct usb_phy phy;
		void __iomem *base;
		void __iomem *qscratch_base;
		void __iomem *tune2_efuse_reg;
		void __iomem *ref_clk_base;

		@@ -686,24 +682,6 @@ static int qusb_phy_set_suspend(struct usb_phy *phy, int suspend)
		return 0;
		}

		static void qusb_write_readback(void *base, u32 offset,
		const u32 mask, u32 val)
		{
		u32 write_val, tmp = readl_relaxed(base + offset);
		tmp &= ~mask; /* retain other bits */
		write_val = tmp \| val;

		writel_relaxed(write_val, base + offset);

		/* Read back to see if val was written */
		tmp = readl_relaxed(base + offset);
		tmp &= mask; /* clear other bits */

		if (tmp != val)
		pr_err("%s: write: %x to QSCRATCH: %x FAILED\n",
		__func__, val, offset);
		}

		static int qusb_phy_notify_connect(struct usb_phy *phy,
		enum usb_device_speed speed)
		{
		@@ -711,18 +689,8 @@ static int qusb_phy_notify_connect(struct usb_phy *phy,

		qphy->cable_connected = true;

		dev_dbg(phy->dev, " cable_connected=%d\n", qphy->cable_connected);

		/* Set OTG VBUS Valid from HSPHY to controller */
		qusb_write_readback(qphy->qscratch_base, HS_PHY_CTRL_REG,
		UTMI_OTG_VBUS_VALID,
		UTMI_OTG_VBUS_VALID);

		/* Indicate value is driven by UTMI_OTG_VBUS_VALID bit */
		qusb_write_readback(qphy->qscratch_base, HS_PHY_CTRL_REG,
		SW_SESSVLD_SEL, SW_SESSVLD_SEL);

		dev_dbg(phy->dev, "QUSB2 phy connect notification\n");
		dev_dbg(phy->dev, "QUSB PHY: connect notification cable_connected=%d\n",
		qphy->cable_connected);
		return 0;
		}

		@@ -733,17 +701,8 @@ static int qusb_phy_notify_disconnect(struct usb_phy *phy,

		qphy->cable_connected = false;

		dev_dbg(phy->dev, " cable_connected=%d\n", qphy->cable_connected);

		/* Set OTG VBUS Valid from HSPHY to controller */
		qusb_write_readback(qphy->qscratch_base, HS_PHY_CTRL_REG,
		UTMI_OTG_VBUS_VALID, 0);

		/* Indicate value is driven by UTMI_OTG_VBUS_VALID bit */
		qusb_write_readback(qphy->qscratch_base, HS_PHY_CTRL_REG,
		SW_SESSVLD_SEL, 0);

		dev_dbg(phy->dev, "QUSB2 phy disconnect notification\n");
		dev_dbg(phy->dev, "QUSB PHY: connect notification cable_connected=%d\n",
		qphy->cable_connected);
		return 0;
		}

		@@ -826,16 +785,6 @@ static int qusb_phy_probe(struct platform_device *pdev)
		if (IS_ERR(qphy->base))
		return PTR_ERR(qphy->base);

		res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
		"qscratch_base");
		if (res) {
		qphy->qscratch_base = devm_ioremap_resource(dev, res);
		if (IS_ERR(qphy->qscratch_base)) {
		dev_dbg(dev, "couldn't ioremap qscratch_base\n");
		qphy->qscratch_base = NULL;
		}
		}

		res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
		"emu_phy_base");
		if (res) {
		@@ -1051,11 +1000,8 @@ static int qusb_phy_probe(struct platform_device *pdev)
		qphy->phy.set_suspend = qusb_phy_set_suspend;
		qphy->phy.shutdown = qusb_phy_shutdown;
		qphy->phy.type = USB_PHY_TYPE_USB2;

		if (qphy->qscratch_base) {
		qphy->phy.notify_connect = qusb_phy_notify_connect;
		qphy->phy.notify_disconnect = qusb_phy_notify_disconnect;
		}

		/*
		* On some platforms multiple QUSB PHYs are available. If QUSB PHY is