Loading Makefile +1 −1 Original line number Diff line number Diff line VERSION = 4 PATCHLEVEL = 4 SUBLEVEL = 31 SUBLEVEL = 32 EXTRAVERSION = NAME = Blurry Fish Butt Loading arch/mips/kvm/emulate.c +1 −1 Original line number Diff line number Diff line Loading @@ -822,7 +822,7 @@ static void kvm_mips_invalidate_guest_tlb(struct kvm_vcpu *vcpu, bool user; /* No need to flush for entries which are already invalid */ if (!((tlb->tlb_lo[0] | tlb->tlb_lo[1]) & ENTRYLO_V)) if (!((tlb->tlb_lo0 | tlb->tlb_lo1) & MIPS3_PG_V)) return; /* User address space doesn't need flushing for KSeg2/3 changes */ user = tlb->tlb_hi < KVM_GUEST_KSEG0; Loading drivers/gpu/drm/amd/amdgpu/atombios_dp.c +16 −4 Original line number Diff line number Diff line Loading @@ -265,8 +265,19 @@ static int amdgpu_atombios_dp_get_dp_link_config(struct drm_connector *connector unsigned max_lane_num = drm_dp_max_lane_count(dpcd); unsigned lane_num, i, max_pix_clock; if (amdgpu_connector_encoder_get_dp_bridge_encoder_id(connector) == ENCODER_OBJECT_ID_NUTMEG) { for (lane_num = 1; lane_num <= max_lane_num; lane_num <<= 1) { max_pix_clock = (lane_num * 270000 * 8) / bpp; if (max_pix_clock >= pix_clock) { *dp_lanes = lane_num; *dp_rate = 270000; return 0; } } } else { for (i = 0; i < ARRAY_SIZE(link_rates) && link_rates[i] <= max_link_rate; i++) { for (lane_num = 1; lane_num <= max_lane_num; lane_num <<= 1) { max_pix_clock = (lane_num * link_rates[i] * 8) / bpp; if (max_pix_clock >= pix_clock) { *dp_lanes = lane_num; Loading @@ -275,6 +286,7 @@ static int amdgpu_atombios_dp_get_dp_link_config(struct drm_connector *connector } } } } return -EINVAL; } Loading drivers/gpu/drm/radeon/atombios_dp.c +16 −4 Original line number Diff line number Diff line Loading @@ -315,8 +315,19 @@ int radeon_dp_get_dp_link_config(struct drm_connector *connector, unsigned max_lane_num = drm_dp_max_lane_count(dpcd); unsigned lane_num, i, max_pix_clock; if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) == ENCODER_OBJECT_ID_NUTMEG) { for (lane_num = 1; lane_num <= max_lane_num; lane_num <<= 1) { max_pix_clock = (lane_num * 270000 * 8) / bpp; if (max_pix_clock >= pix_clock) { *dp_lanes = lane_num; *dp_rate = 270000; return 0; } } } else { for (i = 0; i < ARRAY_SIZE(link_rates) && link_rates[i] <= max_link_rate; i++) { for (lane_num = 1; lane_num <= max_lane_num; lane_num <<= 1) { max_pix_clock = (lane_num * link_rates[i] * 8) / bpp; if (max_pix_clock >= pix_clock) { *dp_lanes = lane_num; Loading @@ -325,6 +336,7 @@ int radeon_dp_get_dp_link_config(struct drm_connector *connector, } } } } return -EINVAL; } Loading drivers/net/ethernet/broadcom/tg3.c +5 −5 Original line number Diff line number Diff line Loading @@ -18142,14 +18142,14 @@ static pci_ers_result_t tg3_io_error_detected(struct pci_dev *pdev, rtnl_lock(); /* We needn't recover from permanent error */ if (state == pci_channel_io_frozen) tp->pcierr_recovery = true; /* We probably don't have netdev yet */ if (!netdev || !netif_running(netdev)) goto done; /* We needn't recover from permanent error */ if (state == pci_channel_io_frozen) tp->pcierr_recovery = true; tg3_phy_stop(tp); tg3_netif_stop(tp); Loading Loading @@ -18246,7 +18246,7 @@ static void tg3_io_resume(struct pci_dev *pdev) rtnl_lock(); if (!netif_running(netdev)) if (!netdev || !netif_running(netdev)) goto done; tg3_full_lock(tp, 0); Loading Loading
Makefile +1 −1 Original line number Diff line number Diff line VERSION = 4 PATCHLEVEL = 4 SUBLEVEL = 31 SUBLEVEL = 32 EXTRAVERSION = NAME = Blurry Fish Butt Loading
arch/mips/kvm/emulate.c +1 −1 Original line number Diff line number Diff line Loading @@ -822,7 +822,7 @@ static void kvm_mips_invalidate_guest_tlb(struct kvm_vcpu *vcpu, bool user; /* No need to flush for entries which are already invalid */ if (!((tlb->tlb_lo[0] | tlb->tlb_lo[1]) & ENTRYLO_V)) if (!((tlb->tlb_lo0 | tlb->tlb_lo1) & MIPS3_PG_V)) return; /* User address space doesn't need flushing for KSeg2/3 changes */ user = tlb->tlb_hi < KVM_GUEST_KSEG0; Loading
drivers/gpu/drm/amd/amdgpu/atombios_dp.c +16 −4 Original line number Diff line number Diff line Loading @@ -265,8 +265,19 @@ static int amdgpu_atombios_dp_get_dp_link_config(struct drm_connector *connector unsigned max_lane_num = drm_dp_max_lane_count(dpcd); unsigned lane_num, i, max_pix_clock; if (amdgpu_connector_encoder_get_dp_bridge_encoder_id(connector) == ENCODER_OBJECT_ID_NUTMEG) { for (lane_num = 1; lane_num <= max_lane_num; lane_num <<= 1) { max_pix_clock = (lane_num * 270000 * 8) / bpp; if (max_pix_clock >= pix_clock) { *dp_lanes = lane_num; *dp_rate = 270000; return 0; } } } else { for (i = 0; i < ARRAY_SIZE(link_rates) && link_rates[i] <= max_link_rate; i++) { for (lane_num = 1; lane_num <= max_lane_num; lane_num <<= 1) { max_pix_clock = (lane_num * link_rates[i] * 8) / bpp; if (max_pix_clock >= pix_clock) { *dp_lanes = lane_num; Loading @@ -275,6 +286,7 @@ static int amdgpu_atombios_dp_get_dp_link_config(struct drm_connector *connector } } } } return -EINVAL; } Loading
drivers/gpu/drm/radeon/atombios_dp.c +16 −4 Original line number Diff line number Diff line Loading @@ -315,8 +315,19 @@ int radeon_dp_get_dp_link_config(struct drm_connector *connector, unsigned max_lane_num = drm_dp_max_lane_count(dpcd); unsigned lane_num, i, max_pix_clock; if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) == ENCODER_OBJECT_ID_NUTMEG) { for (lane_num = 1; lane_num <= max_lane_num; lane_num <<= 1) { max_pix_clock = (lane_num * 270000 * 8) / bpp; if (max_pix_clock >= pix_clock) { *dp_lanes = lane_num; *dp_rate = 270000; return 0; } } } else { for (i = 0; i < ARRAY_SIZE(link_rates) && link_rates[i] <= max_link_rate; i++) { for (lane_num = 1; lane_num <= max_lane_num; lane_num <<= 1) { max_pix_clock = (lane_num * link_rates[i] * 8) / bpp; if (max_pix_clock >= pix_clock) { *dp_lanes = lane_num; Loading @@ -325,6 +336,7 @@ int radeon_dp_get_dp_link_config(struct drm_connector *connector, } } } } return -EINVAL; } Loading
drivers/net/ethernet/broadcom/tg3.c +5 −5 Original line number Diff line number Diff line Loading @@ -18142,14 +18142,14 @@ static pci_ers_result_t tg3_io_error_detected(struct pci_dev *pdev, rtnl_lock(); /* We needn't recover from permanent error */ if (state == pci_channel_io_frozen) tp->pcierr_recovery = true; /* We probably don't have netdev yet */ if (!netdev || !netif_running(netdev)) goto done; /* We needn't recover from permanent error */ if (state == pci_channel_io_frozen) tp->pcierr_recovery = true; tg3_phy_stop(tp); tg3_netif_stop(tp); Loading Loading @@ -18246,7 +18246,7 @@ static void tg3_io_resume(struct pci_dev *pdev) rtnl_lock(); if (!netif_running(netdev)) if (!netdev || !netif_running(netdev)) goto done; tg3_full_lock(tp, 0); Loading